Digital logic voltage regulators and related methods generate a regulated voltage via controlled switching of a power transistor. A digital logic voltage regulator includes a voltage level comparator, a power transistor, and a charge accumulator. The voltage level comparator generates a digital control signal that alternates between a first voltage level and a second voltage level in response to changes in relative voltage level between the regulated output voltage and the target voltage. The digital control signal causes the power transistor to switch from off to on in response to a reduction of the regulated output voltage relative to the target voltage and causes the power transistor to switch from on to off in response to an increase of the regulated output voltage relative to the target voltage. The charge accumulator decreases variation in the regulated output voltage that would occur without the charge accumulator.

Digital logic voltage regulators and related methods generate a regulated voltage via controlled switching of a power transistor. A digital logic voltage regulator includes a voltage level comparator, a power transistor, and a charge accumulator. The voltage level comparator generates a digital control signal that alternates between a first voltage level and a second voltage level in response to changes in relative voltage level between the regulated output voltage and the target voltage. The digital control signal causes the power transistor to switch from off to on in response to a reduction of the regulated output voltage relative to the target voltage and causes the power transistor to switch from on to off in response to an increase of the regulated output voltage relative to the target voltage. The charge accumulator decreases variation in the regulated output voltage that would occur without the charge accumulator.

A voltage regulator and a corresponding method of regulating a voltage are presented. The voltage regulator includes an N-type power switch, an error amplifier, and a switch capacitor circuit. The switch capacitor circuit includes a first capacitor coupled to a network of switches, the switch capacitor circuit has a first port coupled to an output the error amplifier, a second port coupled to an output terminal of the power switch, and a third port coupled to a control terminal of the power switch. The switch capacitor circuit is iteratively operable between a first phase and a second phase. In the first phase the first port is coupled to ground via a path comprising the first capacitor, and in the second phase the second port is coupled to the third port via a path comprising the first capacitor. The voltage regulator may be implemented as a low dropout regulator.

A voltage regulator and a corresponding method of regulating a voltage are presented. The voltage regulator includes an N-type power switch, an error amplifier, and a switch capacitor circuit. The switch capacitor circuit includes a first capacitor coupled to a network of switches, the switch capacitor circuit has a first port coupled to an output the error amplifier, a second port coupled to an output terminal of the power switch, and a third port coupled to a control terminal of the power switch. The switch capacitor circuit is iteratively operable between a first phase and a second phase. In the first phase the first port is coupled to ground via a path comprising the first capacitor, and in the second phase the second port is coupled to the third port via a path comprising the first capacitor. The voltage regulator may be implemented as a low dropout regulator.

A power supply circuit in an embodiment includes a series circuit of a first resistor and a second transistor, the series circuit being connected in parallel to a first transistor between an input terminal and an output terminal, a third transistor configured to output an electric current corresponding to an electric current flowing to the first resistor, a third resistor configured to generate a voltage corresponding to the electric current, and a second operational amplifier configured to output a signal corresponding to a voltage difference between the voltage and a reference voltage to a gate of the first transistor and a gate of the second transistor.

A power supply circuit in an embodiment includes a series circuit of a first resistor and a second transistor, the series circuit being connected in parallel to a first transistor between an input terminal and an output terminal, a third transistor configured to output an electric current corresponding to an electric current flowing to the first resistor, a third resistor configured to generate a voltage corresponding to the electric current, and a second operational amplifier configured to output a signal corresponding to a voltage difference between the voltage and a reference voltage to a gate of the first transistor and a gate of the second transistor.

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

A low-dropout regulator includes a voltage divider circuit, an operation amplifier, a regulator circuit and an output circuit. The voltage divider circuit divides a power supply voltage to generate a predetermined voltage. The operational amplifier generates a bias voltage according to the predetermined voltage and an output voltage of an output terminal. The regulator circuit generates a first regulated voltage and a second regulated voltage according to the bias voltage. The output circuit adjusts a difference between a first current and a second current according to the first regulated voltage and the second regulated voltage to regulate the output voltage.

A low-dropout regulator includes a voltage divider circuit, an operation amplifier, a regulator circuit and an output circuit. The voltage divider circuit divides a power supply voltage to generate a predetermined voltage. The operational amplifier generates a bias voltage according to the predetermined voltage and an output voltage of an output terminal. The regulator circuit generates a first regulated voltage and a second regulated voltage according to the bias voltage. The output circuit adjusts a difference between a first current and a second current according to the first regulated voltage and the second regulated voltage to regulate the output voltage.