An information handling system sets up at power-on self-test, a system management interrupt based on a trap on an input/output port used for a real-time clock and detects at runtime, an operation on the input/output port. In response to detecting the operation on the input/output port, generates the system management interrupt based on the trap on the input/output port. In addition, the information handling system handles the system management interrupt by emulating the real-time clock according to the operation on the input/output port that includes determining a register that is mapped to an index associated with the operation and accessing the register and executing a function associated with the register.

A PUF-film includes a circuit structure having a plurality of circuit elements, wherein the circuit structure is evaluable with respect to a plurality of electric capacitance values being arranged between the plurality of circuit elements, and is evaluable with respect to a plurality of electric resistance values of the plurality of circuit components.

Provided is a method for remotely uploading certified software from a source to a data update module on an asset via a wireless communications link. The method includes encrypting the communications link between the source and the data update module to form a secure tunnel and verifying credentials of the source via the data update module when a software update file is transmitted. A load assurance check is performed on a portion of the transmitted update file to confirm integrity of the transmitted file when the credentials of the source are verified. The uploading of the certified software is immediately activated when the file integrity is verified, the activating occurring automatically and being devoid of human intervention.

Protection of a data file to be used by a white-box cryptography software application installed in memory of a device to prevent the malevolent use of a digital copy of the data file by a white-box cryptography (WBC) software application installed in memory of another device. The mechanism includes extracting an unique identifier for the device from the environment of the device and modifying data in the data file according to the unique identifier, the available white-box cryptography software application includes a software security layer to retrieve the unique identifier from the environment of the device in which the software application is installed and to use this unique identifier in combination with the stored data file when executing, the result of the execution being correct only in case where the correct unique identifier has been extracted by the executed WBC software application.

This Application describes devices, and techniques for using them, capable of providing a secure hardware backdoor for digital devices, thus allowing valid access to secure target device data without the owner's consent, while still assuring the owner's knowledge whenever any access has occurred, whether validly or not. Each target device's data is protected by maintaining protected data encrypted on the target device, maintaining encryption keys for protected data in a “secure enclave”, causing the secure enclave to generate secure data in response to a hardware trigger, the secure data being usable to provide access to the device, and providing relatively difficult yet achievable retrieval of the secure data with physical access to the target device, and using the secure data to access protected data on the target device, while also assuring that the target device's owner can determine when the secure data was retrieved.

A Real-Time Clock (RTC) block configured to output a current time as part of an ASIC configuration that guarantees that the RTC can never be rolled back beyond a checkpointed date and time. A checkpoint memory block is coupled to the RTC block and configured to include a stored active date/time checkpoint, and a set RTC logic block is coupled to the checkpoint memory block and to the RTC block and configured to permit setting the RTC block to an asserted new time request only when the asserted new time is in the future relative to the stored active date/time checkpoint. The active date/time checkpoint is stored in a non-volatile, single-write memory location such as in a one-time programmable (OTP) memory or in a bank of fuses so that the stored active date/time checkpoint is maintained whether or not power is interrupted to the checkpoint memory block.

Provided are an electronic device and an operating method thereof. The electronic device includes a nonvolatile memory; a power management integrated circuit configured to generate operating power based on supply power received from a power source, and generate first time information independent of the supply power; and an application processor configured to receive the operating power, generate second time information, obtain, based on the generation of the operating power being interrupted, the first time information, and output, to the nonvolatile memory, time data including the first time information and the second time information, a write command, and an address.

A Real-Time Clock (RTC) block configured to output a current time as part of an ASIC configuration that guarantees that the RTC can never be rolled back beyond a checkpointed date and time. A checkpoint memory block is coupled to the RTC block and configured to include a stored active date/time checkpoint, and a set RTC logic block is coupled to the checkpoint memory block and to the RTC block and configured to permit setting the RTC block to an asserted new time request only when the asserted new time is in the future relative to the stored active date/time checkpoint. The active date/time checkpoint is stored in a non-volatile, single-write memory location such as in a one-time programmable (OTP) memory or in a bank of fuses so that the stored active date/time checkpoint is maintained whether or not power is interrupted to the checkpoint memory block.

A receiver apparatus and method for optimized decryption and despreading of a very low frequency (VLF) bitstream is disclosed. In embodiments, the receiver includes antenna elements for receiving a transmission security (TRANSEC) encoded bitstream associated with an uncertainty window size and a spread factor. The receiver includes cryptographic processors that, when the spread factor is sufficiently large, select key section numbers A and data section numbers B based on the window size and spread factor. The cryptographic processors generate an output sequence of correlation windows, each correlation window associated with a symbol of the bitstream, via pipelined sectional mirrored-key convolution based on a key section number A and data section number B chosen to optimize performance (e.g., processor performance, memory performance).

In some embodiments, securing device commands includes a first electronic device receiving a command authorization request message from a second electronic device, including a device command to be performed by the second electronic device, a command argument, and a first message authentication code (MAC) generated by applying a hash function to the device command, the command argument and a first counter value. The first electronic device generates a second MAC by applying the hash function to the device command, the command argument and a second counter value synchronized with the first counter value. The first electronic device compares the first MAC and the second MAC to authenticate the device command and transmit a command approval message or a command denial message. The command approval message causes the second electronic device to perform the device command and the command denial message causes the second electronic device to reject the device command.