G06F2111/04

Methods, controllers, and machine-readable storage media for automated commissioning of equipment

Tools and techniques are described to automate commissioning of physical spaces. Controllers have access to databases of the devices that are controlled by them, including wiring diagrams and protocols, such that the controller can automatically check that each wire responds correctly to stimulus from the controller. Controllers also have access to databases of the physical space such that they can check that sensors in the space record the correct information for device activity, and sensors can cross-check each other for consistency. Once a physical space is commissioned, incentives can be sought based on commissioning results.

AESTHETIC HOUSING

A variety of techniques are disclosed for customizing a digital model of an aesthetic housing to receive a functional component and an interface component for the functional component.

Method for optimising the physical model of an energy installation and control method using such a model

A method for determining a physical model of an energy installation from a plurality of components linked together according to one or more constraints to form a tree, called tree of constraints, each component including one or more output ports, each output port being associated with a physical quantity of which the value depends on one or more variables internal to the component and/or on one or more variables external to the component, each external variable being communicated to the component through an input port. A second aspect relates to a method for controlling an electrical installation including a first phase of determining a physical model of the installation using the described method; and a second control phase during which each set point is determined as a function of a simulation carried out using the physical model obtained during the phase of determining a physical model of the energy installation.

ASIC DESIGN METHODOLOGY FOR CONVERTING RTL HDL TO A LIGHT NETLIST

This application discloses the implementation of a self-timed IP with optional clock-less compression and decompression at the boundaries. It also discloses system and methods for application specific integrated circuits to convert RTL code and timing constraints to self-timed circuitry with optional clock-less compression and decompression at the boundaries.

AUTOMATIC OFFICE SPACE LAYOUT
20230004688 · 2023-01-05 ·

A space layout system performs various automated layout techniques to generate space layouts for office and other workspaces. The system can access building information modeling (BIM) information fora space, and automatically determine a layout of desks or other furniture for the space. The system can also provide to receive user input and automatically modify or reconfigure the layout of the space using the automated techniques.

Generating simulation-friendly compact physical models for passive structures

A system and method for generating simulation-friendly compact physical models for passive structures is disclosed. The method includes generating an impedance map specifying impedances at a plurality of frequencies corresponding to one or more port-pairs of a circuit component using a processor to extract a plurality of impedance values between the one or more port-pairs based on a first value for each parameter of a plurality of parameters of the circuit component. The method includes generating a second circuit representation model based on updating the plurality of impedance values between the one or more port-pairs based on a second value for one or more parameters of the plurality of parameters of the circuit component, and updating the second circuit representation model by tuning the updated plurality of impedance values of the between the one or more port-pairs based on a predetermined use context of the circuit component in a circuit.

Learning Optimization Constraints Through Knowledge Based Data Generation

In some examples, a system for generating optimization constraints includes a memory device to store human-generated constraint and/or objective definitions that have been programmed in a general-purpose programming language by a human user, and a processor configured to generate labeled data for a plurality of solutions to an optimization problem using the stored constraint and/or objective definitions. The processor is also configured to generate a formal constraint and/or objective model from the labeled constraint and/or objective data, wherein the formal constraint and/or objective model comprises automatically generated constraint and/or objective definitions that are syntactically different from the human-generated constraint and/or objective definitions and syntactically correct for a specific optimization engine.

Model-Based System Architecture Design Method for Unmanned Aerial Vehicle (UAV) Systems

The present disclosure discloses a model-based architecture design method for an unmanned aerial vehicle (UAV) system, which aims to deal with challenges of changeable operational requirements, shortened design period, and decreased technical risks in a current UAS design process. A data-driven architecture development method is used. By establishing an architecture development framework of the UAS, a framework modeling process oriented to different viewpoints is designed, and modeling and simulation specifications based on SysML and Modelica are defined, such that design of the UAS starts from conception and confirmation of an operational concept. The method focuses on forward analysis and design of a system framework, and concept verification and metric closed-loop are carried out at an early stage of the design of the UAS by virtue of logic modeling and system simulation.

METHOD TO AVOID MEMORY BANK CONFLICTS AND PIPELINE CONFLICTS IN TENSOR MEMORY LAYOUT
20230021472 · 2023-01-26 ·

A method for optimizing a layout of a tensor memory defines at least one hard constraint for allocating a plurality of input/output (I/O) vectors for reading and writing data for a task in the tensor memory. The at least one hard constraint is applied to determine one or more potential conflicts between the plurality of I/O vectors. One or more soft constraints aimed at mitigating the one or more potential conflicts between the I/O vectors may also be generated. The at least one hard constraint is applied in a maximum satisfiability (MaxSAT) solver. The one or more soft constraints may also be applied in the MaxSAT solver. The MaxSAT solver determines locations of the data in the tensor memory. The starting addresses of the input data to be read and of output data to be written by each of the I/O vectors are updated in the tensor memory.