Processes for optimizing the geometry of a blade for use in a propeller are disclosed. In one exemplary process, an optimization routine that generates new blade geometries based on structural parameters and calculates performance parameters of each blade geometry, including aerodynamic performance parameters, farfield acoustic parameters, and/or electrical power requirements to operate a propeller having the blade geometry, is performed. The optimization routine receives design parameters and weightings from a user and can use one or more surrogate algorithms to map a design space of the weighted values of the design parameters to find their local minima. The optimization routine then determines an optimized blade geometry using a gradient-based algorithm to generate new blade geometries to explore the minima until the weighted values of the design parameters converge at an optimized blade geometry representing the global minima of the design space.

Disclosed are a method and an apparatus for string connecting photovoltaic modules. The method includes: acquiring position information of n photovoltaic modules to be connected; categorizing the n photovoltaic modules into m partitions based on the position information of the n photovoltaic modules; generating k candidate connection solutions of an i.sup.th partition in the m partitions, wherein the i.sup.th partition includes m photovoltaic modules, and each of the k candidate connection solutions uses one photovoltaic module in the m photovoltaic modules as a starting point, and obtaining at least one string of photovoltaic modules by simulating connection of the m photovoltaic modules according to a preset connection solution; and selecting a target connection solution from the k candidate connection solutions based on an estimated cable use amount corresponding to each of the k candidate connection solutions.

A method of designing a fire suppression system including: determining nozzle placement for nozzles of a fire suppression system within a location; determining piping placement for pipes of the fire suppression system within the location; determining whether the nozzle placement or piping placement violate a constraint; and generating a map displaying the nozzle placement and the piping placement on a computing device.

This application discloses a computing system to identify structures of an integrated circuit capable of being fabricated utilizing a lithographic mask described by mask layout data and to generate process windows for the identified structures based, at least in part, on the mask layout data and a failure definition for the identified structures. The computing system utilizes process windows for the identified structures to determine failure rates for the identified structures based on a distribution of the manufacturing parameters. The computing system determines frequency of occurrences for the identified structures from the mask layout data and generates a die yield metric for the integrated circuit by aggregating the failure rates for the identified structures based on the frequency of occurrences for the identified structures in the integrated circuit. These increases in yield of the integrated circuit allow manufacturers to produce more units per fixed processing cost of the wafer.

An array of poly lines on an active device area of an integrated chip is extended to form a dummy device structure on an adjacent isolation region. The resulting dummy device structure is an array of poly lines having the same line width, line spacing, and pitch as the array of poly lines on the active device area. The poly lines of the dummy device structure are on grid with the poly lines on the active device area. Because the dummy device structure is formed of poly lines that are on grid with the poly lines on the active device area, the dummy device structure may be much closer to the active device area than would otherwise be possible. The resulting proximity of the dummy device structure to the active device area improves anti-dishing performance and reduces empty space on the integrated chip.

A circuit simulation method includes the following operations: performing Monte Carlo simulations in parallel according to a first netlist file and process model data, in order to generate a performance simulation result, in which the first netlist file is configured to indicate a basic circuit in a circuitry; selecting component parameters lower than a predetermined yield rate according to the performance simulation result; and determining whether an estimated yield rate of the circuitry meets the predetermined yield rate according to the component parameters.

A device receives an infrastructure design document that represents a network infrastructure design. The device causes the infrastructure design document to be displayed via a first interface of a geographic information system (GIS) tool that is to be used during an inspection of a site, where the inspection includes inspecting structural components that are to support equipment of a network. The device receives, from a user device, feedback data that is based on the inspection. The device causes the feedback data to be integrated into the GIS tool. The device receives, from another user device, instructions that are to be used to update the infrastructure design document. The device updates the infrastructure design document based on the set of instructions and performs actions that allow the infrastructure design document to be used when implementing the network infrastructure design.

Certain aspects of the present disclosure provide techniques for testing integrated circuit designs based on test cases selected using machine learning models. An example method generally includes receiving a plurality of test cases for an integrated circuit. An embedding data set is generated from the plurality of test cases. A respective embedding for a respective test case of the plurality of test cases generally includes a mapping of the respective test case into a multidimensional space. A plurality of test case clusters is generated based on a clustering model and the embedding data set. A plurality of critical test cases for testing the integrated circuit is selected based on the plurality of test case clusters. The integrated circuit is timed based on the plurality of critical test cases and a hard macro defining the integrated circuit.

A method for creating a photovoltaic system comprising several interconnected solar panels. The method includes the steps of generating an image of an installation site of the photovoltaic system; receiving, from a user, image coordinates corresponding to points on the image; defining an installation area of the solar panels using the image coordinates; receiving site-specific data of the installation site and solar panel specification data of one or more types of solar panels; and generating a layout of the solar panels within the installation area using the installation area, the site-specific data, and solar panel specification data.

The present application relates to a simulation method and apparatus, a computer device and a storage medium. The method includes: acquiring RDC data and historical test data of products, the RDC data including repair schemes; allocating the repair schemes to failure cells in the historical test data according to a preset RA, and acquiring a corresponding simulation repair result; and obtaining a yield of the products based on the simulation repair result and the historical test data.