System configurations and techniques for implementation of a neural network in neuromorphic hardware with use of external memory resources are described herein. In an example, a system for processing spiking neural network operations includes: a plurality of neural processor clusters to maintain neurons of the neural network, with the clusters including circuitry to determine respective states of the neurons and internal memory to store the respective states of the neurons; and a plurality of axon processors to process synapse data of synapses in the neural network, with the processors including circuitry to retrieve synapse data of respective synapses from external memory, evaluate the synapse data based on a received spike message, and propagate another spike message to another neuron based on the synapse data. Further details for use and access of the external memory and processing configurations for such neural network operations are also disclosed.

A method and system for synchronizing caches after reboot are described. In a cached environment, a host server stores a cache counter associated with the cache, which can be stored in the cache itself or in another permanent storage device. When data blocks are written to the cache, metadata for each data block is also written to the cache. This metadata includes a block counter based on a value of the cache counter. After a number of data operations are performed in the cache, the value of the cache counter is updated. Then, each data block is selectively updated based on a comparison of the value of the cache counter with a value of the block counter in the metadata for the corresponding data block.

A data storage device includes a memory and a controller. The memory includes a first partition and a second partition. The controller includes a pattern detector that is configured to detect one or more tags in data from an access device to be stored in the first partition. The controller is configured to generate, in the second partition, one or more links to the data that is stored in the first partition, the one or more links organized according to metadata associated with the one or more tags.

An I/O enclosure module is provided with one or more I/O enclosures having a plurality of slots for receiving electronic devices. A host adapter is connected a first slot of the I/O enclosure module and is configured to connect a host to the I/O enclosure. A device adapter is connected to a second slot of the I/O enclosure module and is configured to connect a storage device to the I/O enclosure module. A flash cache is connected to a third slot of the I/O enclosure module and includes a flash-based memory configured to cache data associated with data requests handled through the I/O enclosure module. A primary processor complex manages data requests handled through the I/O enclosure module by communicating with the host adapter, device adapter, and flash cache to manage to the data requests.

Provided herein may be a storage device and a method of operating the same. A memory controller for controlling a memory device including a plurality of memory blocks having improved read performance may include a random read workload control unit configured to control a state of a random read workload such that the random read workload is in any one of a set state and a clear state depending on a random read count obtained by counting a number of random read requests that are inputted from an external host; and a random read processing unit configured to retrieve a physical address corresponding to a logical address of the respective random read requests depending on the state of the random read workload.

Systems, devices, and methods for password protection of defined spaces in a memory device. The method includes receiving a data block from a host. The data block includes a user-defined current password, a user-defined new password, a password length of the current password, a password length of the new password, and a user-defined address range field including start and end addresses of a defined space in the memory device. The method further includes matching password lengths of the user-defined current password and a current password length of a current password for the defined space already stored in the memory device. The method also includes comparing the user-defined current password and the current password of the defined space. The method further includes replacing or resetting the current password of the defined space with the user-defined new password based on a result of the matching and a result of the comparing.

Described is an apparatus which comprises: an adjustable power supply source to generate an adjustable power supply; a node to provide the adjustable power supply to a device; and a bus which is operable to: send a first message to the device indicating that the adjustable power supply source is capable of dynamically providing an adjustable power supply; and receive a request from the device, the request indicating a new voltage or current specification.

A data storage interconnect system has a network controller with a first expansion bus switch connected to a central processor over an expansion bus interface thereof, and a first transceiver connected to the first expansion bus switch. A directly attachable storage host with a second transceiver is communicatively linked to the first transceiver of the network controller. A second expansion bus switch is connected to the second transceiver, and is connectable to a removable storage device over an expansion bus interface. The removable storage device communicates with the second expansion bus switch over an expansion bus protocol. A data transmission link interconnects the first transceiver and the second transceiver, with expansion bus protocol data traffic between the first expansion bus switch and the second expansion bus switch being carried thereon.

Systems, devices, and methods for password protection of defined spaces in a memory device. The method includes receiving a data block from a host. The data block includes a user-defined current password, a user-defined new password, a password length of the current password, a password length of the new password, and a user-defined address range field including start and end addresses of a defined space in the memory device. The method further includes matching password lengths of the user-defined current password and a current password length of a current password for the defined space already stored in the memory device. The method also includes comparing the user-defined current password and the current password of the defined space. The method further includes replacing or resetting the current password of the defined space with the user-defined new password based on a result of the matching and a result of the comparing.

A computing device includes a first processor; a second processor; a network interface communicably coupling the first and second processors to a network; an interface bus communicably coupling the first processor to the second processor; a first interface communicably coupling the second processor to the interface bus; a second interface communicably coupling the second processor to the interface bus, the second interface being separate from the first interface, wherein the second interface is configured to provide the second processor with management functionality over one or more hardware components of the computing device; and storage means communicably coupled to the second processor, wherein the second processor regulates access of the first processor to the storage means.