According to one embodiment, an arithmetic device includes a first computational circuit including a first string, the first string having a first magnetoresistive effect element on a first conducting layer; a second computational circuit including a second strings, the second string having second magnetoresistive effect element on a second conducting layer; a third computational circuit executing computational processing using a first signal from the first computational circuit and a second signal from the second computational circuit; and a control circuit. The control circuit sets a condition on write operations with respect to at least one of the first and second magnetoresistive effect elements, based on information related to write error in at least one of the first and second magnetoresistive effect elements.

A magnetic processing unit (“MPU”) includes a magnetic element with one or more input channels and one or more output channels. The magnetic element can acquire magnetic arrangement configured to perform a predetermined operation on the received input signal and provide a resulting output signal.

A multiply and accumulate calculation device includes a multiple calculation unit and a accumulate calculation unit. The multiple calculation unit includes a plurality of multiple calculation elements, which are variable resistance elements, and at least one reference element. The accumulate calculation unit includes an output detector configured to detect a total value of at least outputs from the plurality of multiple calculation elements. Each of the plurality of multiple calculation elements is a magnetoresistance effect element including a magnetized free layer having a magnetic domain wall, a magnetization fixed layer in which a magnetization direction is fixed, and a nonmagnetic layer sandwiched between the magnetized free layer and the magnetized fixed layer. The reference element is a reference magnetoresistance effect element having a magnetization free layer that does not have the magnetic domain wall.

The product-sum operation device includes a product operator and a sum operator. The product operator includes a plurality of product operation elements, and an alternative element that, when any of the plurality of product operation elements has malfunctioned, is used instead of the malfunctioning product operation element. Each of the plurality of product operation elements and the alternative element is a resistance change element. The sum operator includes an output detector which detects a sum of outputs from the plurality of product operation elements when the alternative element is not used.

A multiply and accumulate calculation device includes a multiple calculation unit and a accumulate calculation unit. The multiple calculation unit includes a plurality of multiple calculation elements, which are variable resistance elements, and at least one reference element. The accumulate calculation unit includes an output detector configured to detect a total value of at least outputs from the plurality of multiple calculation elements. Each of the plurality of multiple calculation elements is a magnetoresistance effect element including a magnetized free layer having a magnetic domain wall, a magnetization fixed layer in which a magnetization direction is fixed, and a nonmagnetic layer sandwiched between the magnetized free layer and the magnetized fixed layer. The reference element is a reference magnetoresistance effect element having a magnetization free layer that does not have the magnetic domain wall.

The product-sum operation device includes a product operator and a sum operator. The product operator includes a plurality of product operation elements, and an alternative element that, when any of the plurality of product operation elements has malfunctioned, is used instead of the malfunctioning product operation element. Each of the plurality of product operation elements and the alternative element is a resistance change element. The sum operator includes an output detector which detects a sum of outputs from the plurality of product operation elements when the alternative element is not used.

According to one embodiment, an arithmetic device includes a first computational circuit including a first string, the first string having a first magnetoresistive effect element on a first conducting layer; a second computational circuit including a second strings, the second string having second magnetoresistive effect element on a second conducting layer; a third computational circuit executing computational processing using a first signal from the first computational circuit and a second signal from the second computational circuit; and a control circuit. The control circuit sets a condition on write operations with respect to at least one of the first and second magnetoresistive effect elements, based on information related to write error in at least one of the first and second magnetoresistive effect elements.

A magnetic processing unit (MPU) includes a magnetic element with one or more input channels and one or more output channels. The magnetic element can acquire magnetic arrangement configured to perform a predetermined operation on the received input signal and provide a resulting output signal.