A computational apparatus includes a memory unit and Read-Modify-Write (RMW) logic. The memory unit is configured to hold a data value. The RMW logic, which is coupled to the memory unit, is configured to perform an atomic RMW operation on the data value stored in the memory unit.

This application relates to a method and apparatus for outputting signals. In one aspect, the apparatus includes a signal control unit configured to generate two or more control signals upon two or more conditions, which respectively correspond to the two or more control signals being satisfied. The apparatus also includes a signal output unit configured to output a final output signal depending on the two or more control signals upon an input signal being inputted into the signal output unit.

A differential multiplier-accumulator accepts A and B digital inputs plus a sign bit and generates a dot product P by applying the bits of the A input and the bits of the B inputs to respective positive and negative unit elements comprised of groups of AND gates coupled to charge transfer lines through a capacitor Cu. One of the positive and negative unit element is enabled by the sign bit, the enabled unit element receives one bit of the B input applied to all of the AND gates of the unit element, and each positive and negative unit element having the bits of A applied to each associated AND gate input of each unit element, which charge to charge transfer lines, and the charge transfer lines are coupled to binary weighted charge summing capacitors and to an analog to digital converter to generate a digital output product.

A tool for an approach and mechanism for calculating and configuring memory mapping of trend log objects in a system, such as an HVAC. It may incorporate determining available memory of a controller for trending a unit of equipment of a system. A calculation of available records may be made for configuring and using a trend. The calculation may be made in view of the controller memory and parameters including buffer size, log interval and retention time. A change in parameters may cause a recalculation of available records. The “available record” terms may be regarded as being in a user-understandable format. The format may be intuitive. Anomalies of trends of equipment may lead to spotting issues of the equipment.

This application relates to a method and apparatus for outputting signals. In one aspect, the apparatus includes a signal control unit configured to generate two or more control signals upon two or more conditions, which respectively correspond to the two or more control signals being satisfied. The apparatus also includes a signal output unit configured to output a final output signal depending on the two or more control signals upon an input signal being inputted into the signal output unit.

An accelerating device includes a signal detector that converts a first input signal and a second input signal into a first converted input signal and a second converted input signal, respectively, and that generates a final zero-value flag signal, a first one-value flag signal, and a second one-value flag signal. The accelerating device further includes a processing element (PE) that processes the first converted input signal and the second converted input signal based on the final zero-value flag signal, the first one-value flag signal, and the second one-value flag signal and that skips a first arithmetic operation and a second arithmetic operation when the final zero-value flag signal has a first value. The first value of the final zero-value flag signal indicates that the first input signal, or the second input signal, or both have a value of 0.

An accelerating device includes a signal detector that converts a first input signal and a second input signal into a first converted input signal and a second converted input signal, respectively, and that generates a final zero-value flag signal, a first one-value flag signal, and a second one-value flag signal. The accelerating device further includes a processing element (PE) that processes the first converted input signal and the second converted input signal based on the final zero-value flag signal, the first one-value flag signal, and the second one-value flag signal and that skips a first arithmetic operation and a second arithmetic operation when the final zero-value flag signal has a first value. The first value of the final zero-value flag signal indicates that the first input signal, or the second input signal, or both have a value of 0.

An approach and mechanism for improving reliability, performance and on time execution of critical operations of a system, such as an HVAC. A controller may have two or more processing cores. One core may be dedicated to execution of critical operations of a system. Another core may be dedicated to less- or non-critical operations of the system. For instance, if there are delays relative to the less- or non-critical operations, these delays may be ineffective relative to the processing of critical operations.

A tool for an approach and mechanism for calculating and configuring memory mapping of trend log objects in a system, such as an HVAC. It may incorporate determining available memory of a controller for trending a unit of equipment of a system. A calculation of available records may be made for configuring and using a trend. The calculation may be made in view of the controller memory and parameters including buffer size, log interval and retention time. A change in parameters may cause a recalculation of available records. The available record terms may be regarded as being in a user-understandable format. The format may be intuitive. Anomalies of trends of equipment may lead to spotting issues of the equipment.

The number of non-zero elements is counted for each first row in a first matrix, and the maximum value therefor is determined. Pairs each containing the value and column identifier of a non-zero element are extracted from each first row, and dummy pairs are added for each first row that contains fewer non-zero elements than the maximum value, to generate compressed storage data including the same number of pairs for each first row. A second row with a row identifier corresponding to the column identifier included in each pair is extracted from a second matrix and is multiplied by the value included in the pair, to generate a row vector. By assigning an equal number of threads to each first row and summing row vectors corresponding to each first row using the assigned threads, a third matrix representing matrix multiplication between the first and second matrices is produced.