Aspects of the present disclosure involve techniques and cryptographic processors configured to perform the techniques that include sign-efficient addition and subtraction operations that use Montgomery reduction and are capable of facilitating fast streaming operations. The techniques involve receiving a first number and a second number, where the first number and second number are within a target interval, and performing a modular operation to obtain a third number, the third number being within the same target interval and representing a sum or a difference of a rescaled first number and a rescaled second number, and wherein the modular operation includes a Montgomery reduction.

Embodiments of the present disclosure provide a data processing method implemented at an edge switch, an electronic device, and a program product. For example, a data processing method implemented at an edge switch is provided. The method includes receiving at least two data packets for floating-point arithmetic operations from at least one source device. In addition, the method may include acquiring corresponding floating-point numerical sequences respectively from the at least two data packets; and acquiring a floating-point arithmetic method from at least one data packet of the at least two data packets to determine a floating-point arithmetic result of the corresponding floating-point numerical sequences. The method may further include sending the floating-point arithmetic result to a target device indicated by the at least one data packet of the at least two data packets.

A data processing apparatus that converts a plurality of signed digits representing an input value in redundant representation comprises receiver circuitry to receive, at each of a plurality of iterations, a signed digit from the plurality of signed digits, and previous intermediate data from a previous iteration. Concatenation circuitry performs a concatenation of bits corresponding to the signed digit and bits of the previous intermediate data to produce updated intermediate data. Output circuitry provides the updated intermediate data as previous intermediate data of a next iteration. The previous intermediate data comprises S3[i] in non-redundant representation, which is at least part of the input value multiplied by 3 in non-redundant representation.

An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (C.sub.in), and two consecutive bits for carry-out-bar (C.sub.out), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.

An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (C.sub.in), and two consecutive bits for carry-out-bar (C.sub.out), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.

This method uses the operations of addition or subtraction in combination with comparison to determine a factor pair from a given odd integer.

A system for determining a calculation utilizing differential privacy including an interface and a processor. The interface is configured to receive a request to determine result data of a calculation using multitenanted data. The multitenanted data comprises tenant data associated with a plurality of tenants. The processor is configured to: determine the result data by performing the calculation on the multitenanted data; determine whether a deterministic modification is needed to ensure privacy based at least in part on whether a number of participants in the result data is less than a threshold; and in response to determining that the deterministic modification is needed to ensure privacy: determine the deterministic modification; numerically modify the result data using the deterministic modification to determine modified result data; and provide the modified result data.

A system for determining a calculation utilizing differential privacy including an interface and a processor. The interface is configured to receive a request to determine a result of a calculation using multitenanted data. The processor is configured to determine result data by performing the calculation on the multitenanted data; determine a deterministic modification in the event that the deterministic modification is needed to ensure privacy; modify the result data using the deterministic modification to determine modified result data; and provide the modified result data.

An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (C.sub.in), and two consecutive bits for carry-out-bar (C.sub.out), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.

A system for determining a calculation utilizing differential privacy including an interface and a processor. The interface is configured to receive a request to determine result data of a calculation using multitenanted data. The multitenanted data comprises tenant data associated with a plurality of tenants. The processor is configured to: determine the result data by performing the calculation on the multitenanted data; determine whether a deterministic modification is needed to ensure privacy based at least in part on whether a number of participants in the result data is less than a threshold; and in response to determining that the deterministic modification is needed to ensure privacy: determine the deterministic modification; numerically modify the result data using the deterministic modification to determine modified result data; and provide the modified result data.