Patent classifications
G06F7/5055
Parallel hybrid adder
A combined adder for N logical bits to produce a sum from a first addend having N first addend bits and a second addend having N second addend bits. A least significant adder produces a segment sum of the least significant bits and a carry out. Segment adder pairs are used for each higher order of significant sums. One segment adder produces a segment sum portion, and the other produces an incremented segment sum portion. Carry logic associated with each segment is utilized with a multiplexer to select the incremented segment sum portion or the segment sum portion. The selected segment sum portions are assembled with a most significant carry out to produce the sum.
Increment/decrement apparatus and method
A method comprises receiving an N-bit unsigned number and a control signal, in response to the control signal indicating an increment operation, increasing the N-bit unsigned number by 1 through an increment/decrement apparatus having (2m+3) levels of 2-input logic gates, wherein m is equal to log.sub.2.sup.(N) and in response to the control signal indicating a decrement operation, decreasing the N-bit unsigned number by 1 through the increment/decrement apparatus.
HIGHER-ORDER DATA SKETCHING FOR AD-HOC QUERY ESTIMATION
Technology for using a nested probabilistic data structure to determine properties of a data set. An example method may involve: receiving a data item comprising a first and second item values; accessing a first probabilistic data structure comprising elements with references to a plurality of second probabilistic data structures; evaluating the first probabilistic data structure to identify a set of the second probabilistic data structures, wherein the evaluating comprises applying a set of hash functions to the first item value to generate hash values indicating the set of second probabilistic data structures corresponding to the first item value; evaluating one of the second probabilistic data structures in view of the second item value to identify a set of elements of the second probabilistic data structure corresponding to the second item value; and updating the set of elements of the second probabilistic data structure to represent the data item.
SECURE STORAGE OF MONOTONIC ODO VALUE INSIDE A SECURE HARDWARE ELEMENTS UPDATE COUNTER
A system for securely storing data, such as an odometer value in a vehicle, includes a non-transitory computer readable medium to store instructions of the system and a processor configured to execute the instructions. The processor is configured to use a master key to update a key and use a first key to store a value. The processor is further configured to use a second key for hiding the data and use a third key for securing the data.
METHOD AND APPARATUS FOR GENERATING HARDWARE INTERFACE SIGNAL, AND ELECTRONIC DEVICE
The present disclosure provides a method and apparatus for generating a hardware interface signal, and an electronic device. The method comprises: acquiring, by a first system, a request command; determining multiple pieces of logical bit information corresponding to the request command; and generating a hardware interface signal corresponding to the request command based on the multiple pieces of logical bit information and a timer. The present disclosure solves the technical problem in the related art that the design cost of a chip is relatively high due to the fact that the chip itself needs to have a hardware logic design of a controller.