G06F7/726

OPERATING METHOD OF FLOATING POINT OPERATION CIRCUIT AND INTEGRATED CIRCUIT INCLUDING FLOATING POINT OPERATION CIRCUIT
20230004349 · 2023-01-05 ·

An operating method of a floating point operation circuit includes, in response to receiving a first instruction, generating a first output by performing a fused multiplication and addition operation on a first input, a second input, and a third input. The method further includes, in response to receiving a second instruction, generating a second output by inverting one input of a fourth input, a fifth input, and a sixth input. Generating the second output includes generating a transform factor and a simplified value from the one input.

Finite-field division operator, elliptic curve cryptosystem having finite-field division operator and method for operating elliptic curve cryptosystem

Disclosed herein are a finite-field division operator, an elliptic curve cryptosystem having the finite-field division operator, and a method for operating the elliptic curve cryptosystem. The method for operating an elliptic curve cryptosystem may include, setting, by a key setting unit, a length of a key of a cryptographic algorithm, generating, by the key setting unit, first setup information that indicates a number of words corresponding to the key length, and generating, by the key setting unit, second setup information that indicates a number of repetitions of an operation by a finite-field division operator corresponding to the key length.

RECIPROCAL CALCULATING METHOD AND RECIPROCAL CALCULATING APPARATUS
20220308840 · 2022-09-29 ·

With respect to a method for execution by an information processing apparatus, the method includes calculating a reciprocal in multiplication on a residue field modulo a power of 2.

Method of cryptographic processing of data on elliptic curves, corresponding electronic device and computer program product
09729323 · 2017-08-08 · ·

In one embodiment, it is proposed a method of cryptographic processing of data, the method being executed by an electronic device, and comprising obtaining at least two points belonging to a same elliptic curve defined on an algebraic structure being a finite ring, each point being represented by at least two coordinates. The method is remarkable in that it comprises: obtaining a parameterization of an isomorphism between said elliptic curve and another elliptic curve, said parameterization defining some configuration parameters, each configuration parameter having a range of possible values; determining in function of values of coordinates of said at least two points said configuration parameters, delivering determined configuration parameters; and obtaining coordinates of another point corresponding to an image of an addition of said at least two points through said isomorphism, said another point belonging to said another elliptic curve, and said obtaining being performed without an inversion operation in said algebraic structure, due to said determined configuration parameters.

SYSTEM AND METHOD FOR PROVIDING DEFENCE TO A CRYPTOGRAPHIC DEVICE AGAINST SIDE-CHANNEL ATTACKS TARGETING THE EXTENDED EUCLIDEAN ALGORITHM DURING DECRYPTION OPERATIONS
20170279600 · 2017-09-28 · ·

A system, method and computer-readable storage medium for decrypting a code c using a modified Extended Euclidean Algorithm (EEA) having an iteration loop independent of the Hamming weight of inputs to the EEA and performing a fixed number of operations regardless of the inputs to the EEA thereby protecting a cryptographic device performing the decryption from side-channel attacks.

Efficient architecture and method for arithmetic computations in post-quantum cryptography

A computer processing system for reducing a processing footprint in cryptosystems utilizing quadratic extension field arithmetic such as pairing-based cryptography, elliptic curve cryptography, code-based cryptography and post-quantum elliptic curve cryptography that includes at least one computer processor having a register file with three processor registers operably configured to implement quadratic extension field arithmetic equations in a finite field of F.sub.p.sup.2 and a multiplexer operably configured to selectively shift from each of the three processor registers in sequential order to generate modular additional results and modular multiplication results from the three processor registers.

COMMUNICATION DATA TEXT CONFUSION ENCRYPTION METHOD
20220276841 · 2022-09-01 ·

Provided is a confusion encryption method for communication data text that can prevent attackers from impersonating senders. A plain text is changed to a primary communication data text by adding a one time ID. Confusion is created in the primary communication data text by using a first confusion random number. The confused primary communication data text is changed to a first modified communication data text by adding the first confusion random number. A circular shift operation is performed on the entire first modified communication data text by using a shift count based on a second confusion random number, and the first modified communication data text is then changed to a second modified communication data text by adding the second confusion random number. The second modified communication data text is changed to a communication data text by encryption.

EFFICIENT ARCHITECTURE AND METHOD FOR ARITHMETIC COMPUTATIONS IN POST-QUANTUM CRYPTOGRAPHY

A computer processing system for reducing a processing footprint in cryptosystems utilizing quadratic extension field arithmetic such as pairing-based cryptography, elliptic curve cryptography, code-based cryptography and post-quantum elliptic curve cryptography that includes at least one computer processor having a register file with three processor registers operably configured to implement quadratic extension field arithmetic equations in a finite field of F.sub.p.sup.2 and a multiplexer operably configured to selectively shift from each of the three processor registers in sequential order to generate modular additional results and modular multiplication results from the three processor registers.

SECURE JOINING SYSTEM, METHOD, SECURE COMPUTING APPARATUS AND PROGRAM

A secure joining system is a secure joining system including a plurality of secure computing apparatuses. The plurality of secure computing apparatuses include a first vector joining unit, a first permutation calculation unit, a first vector generation unit, a second vector joining unit, a first permutation application unit, a second vector generation unit, a first inverse permutation application unit, a first vector extraction unit, a second permutation application unit, a third vector generation unit, a second inverse permutation application unit, a second vector extraction unit, a modified second table generation unit, a third permutation application unit, a fourth vector generation unit, a shifting unit, a third inverse permutation application unit, a bit inversion unit, a third vector extraction unit, a modified first table generation unit, a first table joining unit, and a first table formatting unit.

FINITE-FIELD DIVISION OPERATOR, ELLIPTIC CURVE CRYPTOSYSTEM HAVING FINITE-FIELD DIVISION OPERATOR AND METHOD FOR OPERATING ELLIPTIC CURVE CRYPTOSYSTEM

Disclosed herein are a finite-field division operator, an elliptic curve cryptosystem having the finite-field division operator, and a method for operating the elliptic curve cryptosystem. The method for operating an elliptic curve cryptosystem may include, setting, by a key setting unit, a length of a key of a cryptographic algorithm, generating, by the key setting unit, first setup information that indicates a number of words corresponding to the key length, and generating, by the key setting unit, second setup information that indicates a number of repetitions of an operation by a finite-field division operator corresponding to the key length.