Patent classifications
G06F8/451
UPDATING MEDIA DEVICES IN A LOCAL NETWORK WITH A CLIENT-SERVER ARCHITECTURE
Systems, methods, and non-transitory, machine-readable media to facilitate updating media devices in a local network with a client-server architecture are disclosed. A primary media device may be configured to operate as a server in a local network, receive audio/video (A/V) content via an Internet connection and/or a satellite network connection, serve the A/V content to a set of one or more secondary media devices for display with at least one television of a set of one or more televisions, and receive a set of one or more software updates via the Internet connection, a Universal Serial Bus (USB) connection, and/or the satellite network connection. One or more software updates of the set of one or more software updates may be specified for, and may be transferred to, the set of one or more secondary media devices.
OFFLOAD SERVER, OFFLOAD CONTROL METHOD, AND OFFLOAD PROGRAM
An offload server includes: an application code analysis section configured to analyze source code of an application; a PLD processing designation section configured to identify loop statements of the application, generate a plurality of offload processing patterns designating, for each of the identified loop statements, parallel processing and/or pipeline processing on the PLD according to OpenCL, and perform compilation; an arithmetic intensity calculation section configured to calculate arithmetic intensities of the loop statements of the application; and a PLD processing pattern generation section configured to, on the basis of the arithmetic intensities calculated by the arithmetic intensity calculation section, narrow down the loop statements to, as candidates to be offloaded, those having an arithmetic intensity higher than a predetermined threshold.
SYSTEMS AND METHODS FOR FACILITATING STREAMING IN A LOCAL NETWORK WITH MULTIPLE SUBNETS
Systems, methods, and non-transitory, machine-readable media to facilitate streaming in a local network are disclosed. A primary media device may be configured to: operate as a server in a local network, receive audio/video (A/V) content, and provide the A/V content to a first display. A secondary media device may be communicatively connected to the primary media device and may be configured to: operate as a client with respect to the primary media device in the local network, receive the A/V content from the primary media device, and provide the A/V content to a second display. The primary media device and the secondary media device may use multiple subnets in the local network. The primary media device and/or the secondary media device may select a first subnet of the multiple subnets to use based at least in part on a type of content to communicate via the first subnet.
PACKING CONDITIONAL BRANCH OPERATIONS
Disclosed in some examples, are systems, methods, devices, and machine readable mediums which use improved dynamic programming algorithms to pack conditional branch instructions. Conditional code branches may be modeled as directed acyclic graphs (DAGs) which have a topological ordering. These DAGs may be used to construct a dynamic programming table to find a partial mapping of one path onto the other path using dynamic programming algorithms.
Extensible platform for orchestration of data using probes
In a computer system, an orchestration platform includes extensible components that interact with external systems and technology. The platform extension deploys a surrogate component or probe that acts as a bridge between the core platform and the extension technology.
Device profiling in GPU accelerators by using host-device coordination
System and method of compiling a program having a mixture of host code and device code to enable Profile Guided Optimization (PGO) for device code execution. An exemplary integrated compiler can compile source code programmed to be executed by a host processor (e.g., CPU) and a co-processor (e.g., a GPU) concurrently. The compilation can generate an instrumented executable code which includes: profile instrumentation counters for the device functions; and instructions for the host processor to allocate and initialize device memory for the counters and to retrieve collected profile information from the device memory to generate instrumentation output. The output is fed back to the compiler for compiling the source code a second time to generate optimized executable code for the device functions defined in the source code.
Sparsity uniformity enforcement for multicore processor
Methods and systems relating to the field of parallel computing are disclosed herein. The methods and systems disclosed include approaches for sparsity uniformity enforcement for a set of computational nodes which are used to execute a complex computation. A disclosed method includes determining a sparsity distribution in a set of operand data, and generating, using a compiler, a set of instructions for executing, using the set of operand data and a set of processing cores, a complex computation. Alternatively, the method includes altering the operand data. The method also includes distributing the set of operand data to the set of processing cores for use in executing the complex computation in accordance with the set of instructions. Either the altering is conducted to, or the compiler is programmed to, balance the sparsity distribution among the set of processing cores.
Neural network operation reordering for parallel execution
Techniques are disclosed for reordering operations of a neural network to improve runtime efficiency. In some examples, a compiler receives a description of the neural network comprising a plurality of operations. The compiler may determine which execution engine of a plurality of execution engines is to perform each of the plurality of operations. The compiler may determine an order of performance associated with the plurality of operations. The compiler may identify a runtime inefficiency based on the order of performance and a hardware usage for each of the plurality of operations. An operation may be reordered to reduce the runtime inefficiency. Instructions may be compiled based on the plurality of operations, which include the reordered operation.
PACKING CONDITIONAL BRANCH OPERATIONS
Disclosed in some examples, are systems, methods, devices, and machine readable mediums which use improved dynamic programming algorithms to pack conditional branch instructions. Conditional code branches may be modeled as directed acyclic graphs (DAGs) which have a topological ordering. These DAGs may be used to construct a dynamic programming table to find a partial mapping of one path onto the other path using dynamic programming algorithms.
Sparsity uniformity enforcement for multicore processor
Methods and systems relating to the field of parallel computing are disclosed herein. The methods and systems disclosed include approaches for sparsity uniformity enforcement for a set of computational nodes which are used to execute a complex computation. A disclosed method includes determining a sparsity distribution in a set of operand data, and generating, using a compiler, a set of instructions for executing, using the set of operand data and a set of processing cores, a complex computation. Alternatively, the method includes altering the operand data. The method also includes distributing the set of operand data to the set of processing cores for use in executing the complex computation in accordance with the set of instructions. Either the altering is conducted to, or the compiler is programmed to, balance the sparsity distribution among the set of processing cores.