An internal voltage generator of a smart card and a smart card including the same. The internal voltage generator may include: a mode detector that generates a mode signal indicating a contact mode or a contactless mode; a low-drop out (LDO) regulator including an error amplifier, where the LDO regulator is responsive to the mode signal to: in the contact mode, drive the error amplifier with a second driving voltage to generate an error voltage, and regulate the second driving voltage based on the error voltage to generate a first output voltage, and in the contactless mode, drive the error amplifier with the first driving voltage to generate the error voltage, and regulate the second driving voltage based on the error voltage to generate the first output voltage.

It is described an RF communication device comprising: i) an RF antenna functionality; ii) at least one antenna pad connected to the RF antenna functionality; iii) a further functionality which is not an RF antenna functionality; and iv) at least one non-antenna pad electrically connected to the further functionality.

The antenna pad and the non-antenna pad are arranged to be short-circuited with each other, and the non-antenna pad is electrically connected via a connection line to the further functionality within the RF communication device.

Further, a method of manufacturing an RF communication device is described.

A power control unit is provided to control the efficiency of a charge pump converter having a first input terminal and a second input terminal, a primary attenuator and a secondary attenuator between a first input terminal and the second input terminal, a first output terminal, a second output terminal, a secondary attenuator controlling terminal and a primary attenuator controlling terminal to be plugged to the power control unit. The primary attenuator controlling terminal and the secondary attenuator controlling terminal are to attenuate or amplify a signal of the first input terminal and the second input terminal.

A Radio Frequency Identification (RFID) tag is disclosed. The RFID tag includes an antenna port to receive an input AC signal and a hybrid limiter including a clamping device configured to limit a voltage of the input AC signal to a preconfigured limit. The hybrid limiter is configured to provide a stable ground reference for the clamping device.

There is described a rectifier circuit for providing and limiting a supply voltage to an RFID tag, the circuit including a pair of antenna input terminals configured to receive an input signal from an RFID tag antenna. A plurality of charge pump stages are coupled in cascade in such a way that an input terminal of a first charge pump stage in the cascade is connected to ground and an input terminal of each subsequent charge pump stage in the cascade is coupled to an output terminal of the preceding charge pump stage in the cascade. A control logic is configured to select the output terminal of one charge pump stage among the plurality of charge pump stages to provide the supply voltage. Furthermore, an RFID tag and a method of providing and limiting a supply voltage to an RFID tag are described.

In accordance with a first aspect of the present disclosure, a radio frequency identification (RFID) transponder is provided, comprising a charge pump and at least one functional component, wherein: the charge pump is configured to convert an input voltage into an output voltage and to supply the output voltage to the functional component; the functional component is configured to perform a function of the RFID transponder using the output voltage of the charge pump; wherein the charge pump comprises a diode or switch transistor and at least one capacitor coupled to said diode or switch transistor, and wherein the capacitor is configured to compensate for a change of an impedance of said diode or switch transistor. In accordance with a second aspect of the present disclosure, a corresponding method of operating an RFID transponder is conceived.

Embodiments are directed to rectifiers using a single bias current or bias current path to bias multiple rectifying elements. A rectifier that has multiple rectifier stages coupled together serially includes a bias current path coupled to each of the rectifier stages. The bias current path is configured to simultaneously bias rectifying elements in each of the rectifier stages by using a bias current to bias a first rectifying element and reusing the bias current to bias other rectifying elements.

A ground switch is disclosed. The ground switch includes an antenna port, a pair of switching devices coupled with the antenna port and a charge pump coupled with the pair of devices and configured to turn on/off the pair of devices based on an AC input signal received through the antenna port and a DC offset voltage added to the AC input signal. The ground switch further includes a clamping circuit to clamp an output of the charge pump. The ground switch is configured to provide a stable ground to components of devices such that a radio frequency identification (RFID) device.

A voltage limiter incorporated in a radio frequency identification (RFID) integrated circuit (IC) for a RFID tag is disclosed. The RFID IC includes a radio frequency (RF) rectifier and a clock generator. The RF rectifier is configured to convert an AC signal received from an antenna incorporated in the RFID tag to a DC signal. The voltage limiter includes a current sink device coupled between output of the RF rectifier and ground and a charge pump to control conduction of current through the current sink device to limit output voltage of the RF rectifier to a predefined voltage level.

The integrated circuit includes a first node intended to be biased at a first voltage, a second node intended to be biased at a second voltage and having a non-negligible capacitive coupling with the first node. A power supply management device comprises a voltage booster configured to boost a power supply voltage and comprising boost stages configured to generate intermediate voltages on intermediate nodes. A compatibility detection circuit is configured to detect compatibility between the second voltage and one of the intermediate voltages, and, if the second voltage is compatible with an intermediate voltage, to couple the at least one second node to the compatible intermediate node.