An integrated circuit includes a number of components disposed at a surface of a semiconductor body and an interconnect region connecting the components into a functional circuit. A metallic shield is also produced in the interconnect region. A configurable stage is configurable to operate in a receiving antenna configuration or in a detection configuration during which the integrated circuit is configured to detect a presence of an external electromagnetic radiation representative of an attack by injection of faults

An embodiment integrated circuit includes a first electromagnetic pulse detection device that comprises a first loop antenna formed in an interconnection structure of the integrated circuit, a first end of the first antenna being connected to a first node of application of a power supply potential and a second end of the antenna being coupled to a second node of application of the power supply potential, and a first circuit connected to the second end of the first antenna and configured to output a first signal representative of a comparison of a first current in the first antenna with a first threshold.

The present invention is an RFID-enabled electrical connector with connector position assurance (“CPA”) features. The RFID tag is only readable after the CPA features have been fully deployed. The electrical connector is comprised of at least two parts, a socket and a plug. In the illustrated embodiment, a connector housing is positioned between the socket and plug, with both the socket and plug connecting to the connector housing. Until the CPA feature has been fully deployed, the RFID tag is covered by an electrically conductive material, preferably an electrically conductive plastic. The RFID tag can only be properly read after the CPA feature has been fully deployed. To prevent signal leakage, the RFID tag can alternately be placed inside a five-sided box fabricated from electrically conductive material, preferably electrically conductive plastic.

An integrated circuit for hardware security comprises a voltage glitch detection processing system comprising an oscillator circuit that generates and outputs a local oscillator clock which is a function of a supply voltage; a counter clocked by the oscillator circuit to generate at least one count value; and a capture section that synchronizes the at least one count value into a system clock domain for detecting a voltage glitch in the supply voltage.

The disclosure relates to secure data storage and retrieval, in particular to methods and circuits for securely storing data to reduce the possibility of leakage via side channel attacks. Embodiments disclosed include a method of storing a value comprising a series of words, the method comprising: i) combining in a series of XOR operations a word of a first portion of the value, a word of a second portion of the value and an output word of a first random number generator to provide a first combined word; ii) storing the first combined word in a shift register; and iii) repeating steps i) and ii) for each successive word of the first and second portions of the value.

An embodiment integrated circuit includes a first electromagnetic pulse detection device that comprises a first loop antenna formed in an interconnection structure of the integrated circuit, a first end of the first antenna being connected to a first node of application of a power supply potential and a second end of the antenna being coupled to a second node of application of the power supply potential, and a first circuit connected to the second end of the first antenna and configured to output a first signal representative of a comparison of a first current in the first antenna with a first threshold.

An integrated circuit for hardware security comprises a voltage glitch detection processing system comprising an oscillator circuit that generates and outputs a local oscillator clock which is a function of a supply voltage; a counter clocked by the oscillator circuit to generate at least one count value; and a capture section that synchronizes the at least one count value into a system clock domain for detecting a voltage glitch in the supply voltage.

The present invention is an RFID-enabled electrical connector with connector position assurance (“CPA”) features. The RFID tag is only readable after the CPA features have been fully deployed. The electrical connector is comprised of at least two parts, a socket and a plug. In the illustrated embodiment, a connector housing is positioned between the socket and plug, with both the socket and plug connecting to the connector housing. Until the CPA feature has been fully deployed, the RFID tag is covered by an electrically conductive material, preferably an electrically conductive plastic. The RFID tag can only be properly read after the CPA feature has been fully deployed. To prevent signal leakage, the RFID tag can alternately be placed inside a five-sided box fabricated from electrically conductive material, preferably electrically conductive plastic.

Chip cards that are protected from unauthorized access to information and instructions stored in the chip card's chip by unauthorized persons using illicit devices that emulate chip readers to interrogate the chips in chip cards and obtain or download confidential data stored in the chips. The chip cards are disabled when not ready to be used, such that the chips cannot be accessed by illicit devices, thus protecting the chip card owner and/or issuer from potential losses.

According to one aspect, an electronic device includes a power supply terminal, a voltage regulator connected to the power supply terminal, an electronic module connected to the voltage regulator, and a compensation circuit configured to receive an auxiliary current generated by the voltage regulator and being equal to a first fraction of the electronic module current. The compensation circuit includes a current source configured to supply a source current to a cold point, and a compensation stage connected to the power supply terminal and being traversed by an intermediate current equal to a difference between the source current and the auxiliary current and by a complementary current equal to the intermediate current multiplied by an inverse multiplication factor of the first fraction.