A display device includes a partition wall on a substrate, a plurality of light emitting elements respectively located on a plurality of emission areas defined by the partition wall, the plurality of light emitting elements extend in a thickness direction of the substrate, a base resin located in the plurality of emission areas, and a plurality of optical patterns located on at least one of the plurality of emission areas, wherein the plurality of emission areas are arranged in a RGBG matrix pattern by the partition wall.

Disclosed is a display device which includes a display panel that includes a plurality of pixels and includes a display area displaying an image, a panel controller that receives an external input signal from an external source and generates a control signal for dividing the display area into a first area and a second area which is disposed adjacent to the first area based on the external input signal, and an instrument module that stretches the first area and the second area of the display panel in response to the control signal. The number of the pixels per unit area in the first area is different from the number of the pixels per unit area in the second area.

A display device includes a display panel including a first display area including first pixels, and a second display area including a pixel portion, in which second pixels are disposed, and a transmission portion through which light is transmitted. The pixel portion of the second display area includes a base member, a metal layer disposed on the base member to define the transmission portion, a first active layer disposed on the metal layer and including a first material, and a first gate layer disposed on the first active layer. A hole is defined through the metal layer to overlap at least a part of the first active layer in a thickness direction.

A display device includes a display panel including a first display area; a second display area protruding in a first direction from the first display area; and a first non-display area adjacent to a side of the second display area. Each of the first display area and the second display area includes subpixels that display an image and scan lines electrically connected to the subpixels. The first non-display area includes dummy pixels; a common scan line electrically connected to the dummy pixels; load matching switch elements respectively disposed between the scan lines and the common scan line; and a load matching driving circuit that outputs load matching control signals to control turn-on and turn-off of the load matching switch elements.

The present disclosure relates to a driving unit. The driving unit may include a first driving sub-circuit, a second driving sub-circuit, and a driving control circuit. The first driving sub-circuit may include a plurality of first switching elements, and at least some of the plurality of first switching elements may be configured to output a first signal to a first output terminal of the driving unit in response to a control signal from the driving control circuit. The second driving sub-circuit may include one or more second switching elements, and at least one of the one or more second switching elements may be configured to output a second signal to a second output terminal of the driving unit in response to the control signal from the driving control circuit. The driving control circuit may be configured to output the control signal at a control signal output terminal.

A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations.

A scanning circuit, a display panel and a display device. The scanning circuit includes a scanning signal output module, a light emitting control signal output module, a first output control module, a second output control module, a reset module, a clock signal input terminal, a first potential signal input terminal, a second potential signal input terminal, a scanning signal output terminal, a light emitting control signal output terminal, a shift signal input terminal and a reset control signal input terminal.

A display substrate including a scan driving circuit, a scan line, and an insulating pattern. The scan driving circuit includes a connection electrode disposed on a plurality of insulating layers, a plurality of signal lines, and a stage circuit connected to the signal lines and overlaps a non-display area. The scan line overlaps a display area and is connected to the scan driving circuit. The insulating pattern is disposed on the insulating layers, covers the connection electrode, and makes contact with a sealant.

The present disclosure provides a pixel driving circuit including a driving transistor, a capacitor and a light emitting device, and further includes: a first reset module; a data writing module; a threshold compensation module including a compensation transistor; a light emitting control module configured to disconnect the first power terminal from the first electrode of the driving transistor and disconnect the second electrode of the driving transistor from the light emitting device in the data writing phase and the reset phase; and to enable the first power terminal and the first electrode of the driving transistor to be electrically connected to each other and enable the second electrode of the driving transistor and the light emitting device to be electrically connected to each other in a light emitting phase; the compensation transistor is an oxide transistor, and the driving transistor is a low temperature poly-silicon transistor.

An organic light emitting diode display includes a substrate, a scan line on the substrate for transferring a scan signal, a data line crossing the scan line and for transferring a data signal, a driving voltage line crossing the scan line and for transferring a driving voltage, a switching thin film transistor coupled to the scan line and the data line, a driving thin film transistor coupled to a switching drain electrode of the switching thin film transistor, and an organic light emitting diode (OLED) coupled to a driving drain electrode of the driving thin film transistor, wherein a driving semiconductor layer of the driving thin film transistor is bent and in a plane substantially parallel to the substrate.