Disclosed is a display device which includes a display panel that includes a plurality of pixels and includes a display area displaying an image, a panel controller that receives an external input signal from an external source and generates a control signal for dividing the display area into a first area and a second area which is disposed adjacent to the first area based on the external input signal, and an instrument module that stretches the first area and the second area of the display panel in response to the control signal. The number of the pixels per unit area in the first area is different from the number of the pixels per unit area in the second area.

A display device and a driving method thereof are discussed. The display device can include a display panel for displaying images, a scan driver for supplying scan signals to the display panel, and a gate compensation circuit. The gate compensation circuit is configured to respectively sense a first node voltage and a second node voltage from a first node controller and a second node controller of the scan driver, and change a turn-on duty ratio of the first node controller to the second node controller based on the sensed first node voltage and second node voltage.

Provided are a gate driver circuit used in a display device and a method for driving the same. Charge sharing is adaptively achieved according to the phase of a clock signal outputted by the output ends of buffers in the gate driver circuit, so that power consumed when a gate line is driven can be reduced.

A display apparatus includes: a display panel configured to display an image, at least one supporting member on a rear surface of the display panel, the at least one supporting member defining a groove, at least one sound generation device adjacent to the display panel, and a wiring, accommodated into the groove, configured to transfer a signal to the at least one sound generation device.

A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

A micro light-emitting diode (μLED) array system can include an image post processor configured to translate received image data to pulse width modulation (PWM) and/or analog current control data, an input frame buffer configured to receive the control data, a plurality of individually controllable μLEDS of a μLED array, a return frame buffer that receives data indicating a μLED electrical output characteristic including an output current, and compare circuitry configured to compare image data from the input and return frame buffers, and transfer comparison data to the image post processor, the image post processor configured to alter individual μLED control data based on the comparison data.

An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

An integrated circuit (IC) chip includes a via contact plug extending inside a through hole passing through a substrate and a device layer, a via contact liner surrounding the via contact plug, a connection pad liner extending along a bottom surface of the substrate, a dummy bump structure integrally connected to the via contact plug, and a bump structure connected to the connection pad liner. A method of manufacturing an IC chip includes forming an under bump metallurgy (UBM) layer inside and outside the through hole and forming a first connection metal layer, a second connection metal layer, and a third connection metal layer. The first connection metal layer covers the UBM layer inside the through hole, the second connection metal layer is integrally connected to the first connection metal layer, and the third connection metal layer covers the UBM layer on the connection pad liner.

The present application provides a display panel and a display method thereof. The display method includes following steps: obtaining a real-time display frequency of a liquid crystal panel in response to a display operation of the display panel; and regulating backlight brightness of a backlight module according to the real-time display frequency, such that display brightness of the display panel is maintained within a target brightness range.

Disclosed is a LED display system and a control method thereof. The display system comprises a control card outputting clock signals and data signals; at least one driving circuit group, coupled with the control card, and each including a plurality of cascaded driving circuits, receiving a clock signal and a data signal and transmitting them among the plurality of driving circuits, wherein at least one stage of driving circuit in each driving circuit group comprises an inverter, which inverts the clock signal received by the current stage of driving circuit to obtain an inverted clock signal. The LED display system of the present disclosure can effectively avoid excessive attenuation of the clock signal in the cascaded driving circuits, ensure data sampling correctness based on the clock signal, and ensure display effect of the LED display screen.