In one embodiment, a computing system may store, in a memory unit, a first array of pixel values to represent a scene as viewed along a first viewing direction. The first array of pixel values may correspond to a number of positions uniformly distributed in an angle space. The system may determine an angular displacement from the first viewing direction to a second viewing direction. The system may determine a second array of pixel values to represent the scene as viewed along the second viewing direction by: (1) shifting a portion of the first array of pixel values in the memory unit based on the angular displacement, or (2) reading a portion of the first array of pixel values from the memory unit using an address offset determined based on the angular displacement. The system may output the second array of pixel values to a display.

This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.

A projector includes: an electro-optical panel including a plurality of pixels; an optical-path shift element configured to change an optical path of light emitted from the plurality of pixels; and an image processing circuit configured to, in a unit period, supply an image signal to the plurality of pixels in an order, the unit period being included in one frame period for displaying an image of one frame indicated by an input image signal, the image signal corresponding to the plurality of pixels and being generated on a basis of the input image signal, in which the image processing circuit includes an adjustment circuit configured to adjust a response velocity of the plurality of pixels when the image displayed by the electro-optical panel is switched, on a basis of an order of supply of the image signal or of a position of a pixel at the electro-optical panel.

This disclosure describes efficient communication of surface texture data between system on a chip (SOC) integrated circuits. An example system includes a first integrated circuit and a second integrated circuit communicatively coupled to the first integrated circuit by a video communication interface. The first integrated generates a superframe in a video frame of the video communication interface for transmission to the second integrated circuit. The superframe includes multiple subframe payloads that carry surface texture data to be updated in the frame and corresponding subframe headers that include parameters of the subframe payloads. The second integrated circuit includes a direct access memory (DMA) controller. The DMA upon receipt of the superframe, writes the surface texture data within each of the subframe payloads directly to an allocated location in memory based on the parameters included in the corresponding one of the subframe headers.

A disclosed technique includes transmitting data in a first buffer associated with a first display pipe to a first display associated with the first display pipe; transmitting data in a second buffer associated with a second display pipe to the first display; requesting wake-up of a memory; and refilling one or both of the first buffer and the second buffer from the memory.

The present disclosure provides an image data processing device, an image data processing method and a display device. The image data processing device includes: a plurality of writing controllers corresponding to a plurality of image blocks into which an input image is divided, and each configured to obtain input data of one image block in each input image, determine a frame address of the input data stored in a memory, and transmit the input data to the memory in accordance with the determined frame address; and a plurality of reading controllers, each reading controller corresponding to one image block into which an output image is divided, and configured to determine a frame address of the output data of one image block in ach output image in the memory, and read output data from the memory in accordance with the determined frame address.

A disclosed technique includes transmitting data in a first buffer associated with a first display pipe to a first display associated with the first display pipe; transmitting data in a second buffer associated with a second display pipe to the first display; requesting wake-up of a memory; and refilling one or both of the first buffer and the second buffer from the memory.

The present invention provides a persistence of vision (POV) display device using a light emitting element, the display device comprising: a fixed module including a motor; a rotating module located on the fixed module and rotated by the motor; at least one panel coupled to the rotating module; a plurality of light sources arranged on the panel and having a plurality of pixels; a light source module including a light emitting element array in which the plurality of light sources are arranged in a longitudinal direction; memory that stores video data received from an external source device; and a controller that controls the order of input of the video data and the order of output of the video data.

The present teaching relates to method, system, medium, and implementations for LED display. A first signal is received that signals a timing for a next data transfer. In response to the first signal, a bit-based image block stored in a memory is transferred, via a bus connected thereto, to one of a pair of alternate buffers pointed to by a write buffer pointer, which is subsequently toggled to point to another of the pair of alternate buffers. A second signal is received that signals a timing for refreshing the LED display. In response to the second signal, the bit-based image block is retrieved from the one of the pair of alternate buffers pointed to by a read buffer pointer, which is then toggled to point to the other of the pair of alternate buffers. The lights of the LED display are then refreshed in accordance with control signals generated based on the bit-based image block.

A method includes: transmitting a screen shared by a plurality of apparatuses coupled through a network to the plurality of apparatuses at a given interval; updating the screen based on operation information when receiving the operation information regarding the screen from a first apparatus which an operation right regarding the screen is given among the plurality of apparatuses; and determining, by a processor, the given interval based on comparison between a first index value that represents smoothness of display of the screen in the first apparatus and a second index value that represents smoothness of display of the screen in a second apparatus among the plurality of apparatuses when the operation right is moved from the first apparatus to the second apparatus.