A display panel includes a sub-pixel array, gate lines, first data lines, second data lines, a pixel control circuit and a time-division multiplexing circuit. The sub-pixel array includes a plurality of sub-pixels arranged in rows and columns. Sub-pixels in a same row are coupled to the pixel control circuit through at least one gate line. Sub-pixels located in odd-numbered rows in sub-pixels in a same column are coupled to a first data line, and sub-pixels located in even-numbered rows in the sub-pixels in the same column are coupled to a second data line. The time-division multiplexing circuit is coupled to the plurality of first data lines, the plurality of second data lines, and a data signal terminal. The time-division multiplexing circuit is configured to electrically connect the data signal terminal to the first data lines and the second data lines in a time-division manner.

A display panel includes a sub-pixel array, gate lines, first data lines, second data lines, a pixel control circuit and a time-division multiplexing circuit. The sub-pixel array includes a plurality of sub-pixels arranged in rows and columns. Sub-pixels in a same row are coupled to the pixel control circuit through at least one gate line. Sub-pixels located in odd-numbered rows in sub-pixels in a same column are coupled to a first data line, and sub-pixels located in even-numbered rows in the sub-pixels in the same column are coupled to a second data line. The time-division multiplexing circuit is coupled to the plurality of first data lines, the plurality of second data lines, and a data signal terminal. The time-division multiplexing circuit is configured to electrically connect the data signal terminal to the first data lines and the second data lines in a time-division manner.

A light-emitting display apparatus includes a display panel configured to display an image, a data driving circuit configured to apply a data voltage to the display panel, and a signal applying circuit configured to apply a data voltage output from a first channel of the data driving circuit to one of at least two data lines disposed on the display panel, in which the signal applying circuit includes a compensation circuit configured to prevent a data voltage increase due to signal coupling when the data voltage output from the first channel is applied to one of the at least two data lines.

A light-emitting display apparatus includes a display panel configured to display an image, a data driving circuit configured to apply a data voltage to the display panel, and a signal applying circuit configured to apply a data voltage output from a first channel of the data driving circuit to one of at least two data lines disposed on the display panel, in which the signal applying circuit includes a compensation circuit configured to prevent a data voltage increase due to signal coupling when the data voltage output from the first channel is applied to one of the at least two data lines.

A display driver integrated circuit includes a gamma circuit, a control circuit, and an output buffer circuit. The gamma circuit generates a plurality of gamma voltages based on gamma control information, a first gamma power supply voltage and a second gamma power supply voltage. The control circuit calculates a gamma limit value based on panel brightness information, voltage levels of the first and second gamma power supply voltages and the number of the plurality of gamma voltages. The control circuit generates a mode determination signal. The output buffer circuit includes a plurality of buffer circuits. Each of the plurality of buffer circuits includes an input stage and the input stage includes first transistors and second transistors. In a first driving mode, each of the plurality of buffer circuits turns off the first transistors and turns on the second transistors included in the input stage.

A display device includes: a first substrate including a display area and a non-display area at least partially surrounding the display area; a second substrate disposed on the first substrate; a pixel layer disposed on the display area between the first substrate and the second substrate; a seal disposed on the non-display area between the first substrate and the second substrate; a pad connected to the pixel layer and disposed on the non-display area; and a dummy element in a hole in the seal, the dummy element being disposed on the pad.

A display device includes: a first substrate including a display area and a non-display area at least partially surrounding the display area; a second substrate disposed on the first substrate; a pixel layer disposed on the display area between the first substrate and the second substrate; a seal disposed on the non-display area between the first substrate and the second substrate; a pad connected to the pixel layer and disposed on the non-display area; and a dummy element in a hole in the seal, the dummy element being disposed on the pad.

A display device including: a substrate; an active layer, and including channel and conductive regions; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.

A display device including: a substrate; an active layer, and including channel and conductive regions; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.

An electronic apparatus includes a base substrate having a first region, a second region at least partially surrounded by the first region, and a display region at least partially surrounding the first region, a plurality of pixels disposed on the base substrate, each of which includes a transistor and a light emitting element connected to the transistor, a hole line connecting pixels with the second region interposed therebetween, and a hole pattern electrically insulated from the hole line, disposed in the first region, and at least partially surrounding the second region.