Provided are a display panel and manufacturing method thereof, control method and display apparatus. The display panel includes a first substrate including first base substrate and driving structure layer, and a second substrate including second base substrate and black matrix layer, driving structure layer includes multiple switching transistors, the display panel includes multiple pixel units, each pixel unit includes a switching transistor. One side of black matrix layer close to first substrate is provided with multiple groove structures corresponding to multiple pixel units one-to-one. Orthographic projection of black matrix layer on first base substrate covers those of multiple switching transistors on first base substrate, and orthographic projection of the groove structure on first base substrate at least partially overlaps with that of a channel region of switching transistor in corresponding pixel unit on first base substrate to enable light meeting preset wavelength condition to be incident into the display panel.

The present invention provides a data processing device connected with an intermission driving. The data processing device achieves a satisfactory power saving while ensuring a high level of display quality of the display device. Upon detection of non-data update in a frame buffer, the host calculates a next refreshing timing based on driving information obtained from a liquid crystal display device (LCD), sets a timer for a timeout after a length of time representing the calculated result, and then the host and the LCD shift to Intermission State 1. Thereafter, when the timer times out to bring the host back to Normal State and a data update at the frame buffer is detected, data for refreshing an display image in the LCD is transferred from the host to the LCD. If the amount of time representing the calculated result is longer than a predetermined baseline, a shift is made to Intermission State 2 which provides greater power saving than Intermission State 1.

One embodiment provides for a display system to generate and display data on a display device, the display system comprising one or more graphics processors to generate one or more frames of data for display on the display device; a window manager to submit a request to display the one or more frames of data; a display engine to present the one or more frames of data to the display device for display; and display logic to receive the request to display the one or more frames of data and generate one or more display events for the display engine based on the request to display the one or more frames of data, wherein the display logic is to manage a set of statistics associated with the request.

A wearable computing device includes an outer covering, a housing, an electronic display configured to display an image, and a display drive integrated circuit (DDIC) comprising a processor and a memory device. The memory device(s) includes a blanking time programmed therein based on one or more parameters of the image and/or the DDIC, which generally refers to the time period in which the DDIC receives pixel data of the image from an external controller. The memory device stores instructions that when executed by the processor cause the processor to perform operations, including receiving an indication to rotate the image by a certain angle, upon receipt of the indication, starting to receive a transmission of the pixel data of the image from the external controller, and completing the transmission of the pixel data of the image during the blanking time and before the DDIC displays the image on the electronic display so as to avoid a tearing effect of the image on the electronic display.

Systems, apparatuses, and methods for performing asynchronous memory clock changes on multiple displays are disclosed. From time to time, a memory clock frequency change is desired for a memory subsystem storing frame buffer(s) used to drive pixels to multiple displays. For example, when the real-time memory bandwidth demand differs from the memory bandwidth available with the existing memory clock frequency, a control unit tracks the vertical blanking interval (VBI) timing of a first display. Also, the control unit causes a second display to enter into panel self-refresh (PSR) mode. Once the PSR mode of the second display overlaps with a VBI of the first display, a memory clock frequency change, including memory training, is initiated. After the memory clock frequency change, the displays are driven by the frame buffer(s) in the memory subsystem at an updated frequency.

A method and apparatus for controlling a display frequency of a display screen, and an electronic device are provided. The method includes: (S101) determining, in a command mode in response to no image data being transmitted to the display screen by an application processor currently, whether the display screen is in a self-refreshing state; (S102) transmitting, in response to the display screen being in the self-refreshing state, notification information to the application processor after self-refreshing of the display screen is completed, the notification information being used for notifying the application processor to transmit the image data to the display screen; and (S103) receiving the image data transmitted by the application processor, and updating the display frequency with a first frequency at which the application processor transmits the image data.

The disclosure provides a display equipment, a brightness compensation device, and a brightness compensation method. The brightness compensation device includes a variable refresh rate (VRR) detection circuit and a control circuit. The VRR detection circuit and the control circuit receive a video stream from a video source device, and the video stream includes a VRR video frame. The VRR detection circuit detects a blanking period of the VRR video frame and generates a detection result. The control circuit outputs the frame data of the VRR video frame to the display device during the valid data period of the VRR video frame. The control circuit repeatedly outputs the frame data of the VRR video frame to the display device during the blanking period of the VRR video frame according to the detection result until the blanking period ends.

The present invention relates to a display device having a more improved variable refresh rate (VRR) function, and comprises: a control unit for executing a variable refresh rate (VRR) function of adjusting a screen refresh rate according to an image signal; and a display unit for outputting an image according to the screen refresh rate, wherein the control unit can increase the screen refresh rate adjusted according to the image signal.

Technology for a display device is described. The display device can include at least one display screen operable to show at least one display panel. The display device can include a controller. The controller can receive a content frame from a content source over a transport topology. The controller can receive a presentation timestamp (PTS) associated with the content frame, where the PTS indicates an earliest time at which the content frame is to be displayed at the display device. The controller can provide the content frame for display on the display panel at a subsequent panel refresh opportunity in accordance with the PTS.

A display system receives first timing information prior to the display system entering a panel self-refresh (PSR) mode. The display system supports a range of refresh rates. Prior to the display system entering the PSR mode, first timing information indicating a first refresh rate that is lower than a maximum refresh rate supported by the display system is received by the display system. The display system then refreshes images at a second refresh rate that is less than or equal to the first refresh rate using a frame stored in a buffer prior to entering the PSR mode. In some cases, the processing unit also receives second timing information from the display system in response to initiating an exit from a panel self-refresh (PSR) mode. The second timing information indicates a current scanout line that is used to schedule transmission of a subsequent frame.