Disclosed is a touch sensitive display apparatus which decreases a load of each of a plurality of touch electrodes and reduces a load deviation between the plurality of touch electrodes, thereby enhancing image quality. The touch sensitive display apparatus comprises a touch sensitive panel. The touch panel comprises a plurality of touch electrodes comprising at least a first touch electrode. The first touch electrode comprises a plurality of first touch electrode lines that are parallel to each other. A first touch signal line is connected to the plurality of first touch electrode lines of the first touch electrode, and the first touch electrode is driven for image display and touch sensing via the first touch signal line. A first connecting line is in a different layer than the first touch electrode lines, and the first connecting line is connected to the plurality of first touch electrode lines.

A system, circuit, and method for implementing a low power common electrode voltage for a display (e.g., LCoS display) having transistors with low to moderate breakdown voltages may include a first and a second low voltage amplifier, wherein the first amplifier generates a pixel voltage and the second amplifier generates a predetermined voltage. The circuit may include a common electrode circuit coupled to the first and second amplifier to generate a common electrode voltage. Particularly, the circuit may include a control circuit coupled to the common electrode circuit, wherein, during a first phase, the control circuit selectively controls the common electrode circuit to generate a low common electrode voltage based upon a negative value of the predetermined voltage. Further, during a second phase, the control circuit selectively controls the common electrode circuit to generate a high common electrode voltage based upon the sum of the predetermined voltage and the pixel voltage.

The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in n.sup.th pixel row and m.sup.th pixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1).sup.th pixel row and the m.sup.th pixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.

The present disclosure relates to a circuit of controlling a common voltage of a liquid crystal panel. According to an embodiment of the present disclosure, a voltage control circuit is configured to provide a common voltage to a common electrode of a liquid crystal panel. The liquid crystal panel includes M rows and N columns of pixel units. Each pixel unit is coupled to the common electrode. The voltage control circuit includes an operational amplifier arranged in a negative feedback configuration. The operational amplifier includes: an input stage, a gain stage and an output stage. The output stage includes a second NMOS transistor and a second PMOS transistor. A gate of the second NMOS transistor receives a first control signal, a drain of the second NMOS transistor is coupled to a gate of a first PMOS transistor, and a source of the second NMOS transistor is coupled to a second reference voltage. A gate of the second PMOS transistor receives a second control signal, a drain of the second PMOS transistor is coupled to a gate of a first NMOS transistor, and a source of the second PMOS transistor is coupled to a third reference voltage.

A display panel driving method, a drive circuit thereof, and a display device. The method comprises: when determined that the picture to be displayed belongs to a high power consumption display picture, providing a touch control and display integrated circuit and power supply management circuit of the display panel with a second reference voltage that is amplified by a first reference voltage and that is provided by an external voltage source, and driving each pixel to ensure the normal display of the high power consumption display picture; and when determined that the picture to be displayed belongs to a low power consumption display picture, directly providing the first reference voltage to the touch control and display integrated circuit and power supply management circuit of the display panel, and driving each pixel within the display panel so as to ensure the normal display of the low power consumption picture.

A liquid crystal display driving method provided includes the following steps: acquiring a current gray level value of a current frame image; determining a gray level of the current gray level value; if the current gray level value is the high gray level, then determining whether to perform an overvoltage driving according to a first gray level difference threshold value; if the current gray level value is the low gray level, then determining whether to perform the overvoltage driving according to a second gray level difference threshold value. The present invention can precisely determine whether to perform the overvoltage driving on the pixel electrode.

The disclosure provides a pixel circuit and a driving method thereof, a driving circuit, and a display device, which pertains to the field of pixel driving technology. The pixel circuit includes a capacitor, a capacitor charging transistor, a first and second capacitor discharging transistor. The capacitor is charged to a first voltage greater than the pixel voltage when the capacitor charging transistor is turned on. The capacitor is connected in series with the first and second capacitor discharging transistor to form a discharge circuit, and the capacitor is discharged when the first and second capacitor discharging transistor are turned on so that the voltage across the capacitor drops from the first voltage to the pixel voltage. There is no need to arrange a Gamma resistor for the driving circuit for the pixel circuit array provided by the disclosure, which makes the structure simple and the power consumption in driving low.

A display drive circuit is provided, including a line buffer, a lever converter, a D/A converter, a Gamma reference voltage generator, and a buffer. The Gamma reference voltage generator has a first duty time and second duty time. In the first duty time, the Gamma reference voltage generator outputs the Gamma voltage to the buffer to charge pixel electrodes of a display having the display drive circuit. In the second duty time, the Gamma reference voltage generator outputs a common voltage to the buffer.

An electronic device includes a first source group and a second source group, each of which includes a plurality of source channels, and a gamma block that receives first to 2i-th initial voltages (i being an integer of 1 or more), outputs first to 2i-th intermediate voltages by amplifying the first to i-th initial voltages, and outputs first to i-th gamma voltages to the first source group by buffering the first to 2i-th intermediate voltages, and a first buffer block that receives the first to 2i-th intermediate voltages from the gamma block and buffers the first to 2i-th intermediate voltages so as to be output to the second source group, and the gamma block may include a first resistor string including a plurality of resistors connected between nodes from which the first to i-th gamma voltages are output.

An array substrate has a display area and a bonding region. The display area includes a distal region, a proximal region, and a middle region therebetween. The array substrate includes a base, a common electrode located in the display area, a connecting lead disposed outside the distal region, a conductive frame at least partially surrounding the display area, and at least one first common signal line, at least one second common signal line and at least one third common signal line. The first common signal line, the second common signal line and the third common signal line are respectively coupled to portions of the common electrode located in the distal region, the proximal region and the middle region. The first common signal line is coupled to the connecting lead. The connecting lead and the portion of the common electrode located in the distal region are coupled to the conductive frame.