Patent classifications
G11C11/161
MAGNETORESISTIVE DEVICES AND METHODS THEREFOR
A magnetoresistive stack may include: a fixed region having a fixed magnetic state, a spacer region, a first dielectric layer and a second dielectric layer, where both the first dielectric layer and the second dielectric layer are between the fixed region and the spacer region, and a free region between the first dielectric layer and the second dielectric layer. The free region may be configured to have a first magnetic state and a second magnetic state. The free region may include an interface layer, a multilayer structure, an insertion layer (e.g., a metallized insertion layer), one or more ferromagnetic layers (e.g., metallized ferromagnetic layers), and/or a transition layer (e.g., a metallized transition layer).
SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY WITH INTEGRATED DIODE
A spin-orbit torque magnetoresistive random-access memory device formed by fabricating a spin-Hall-effect (SHE) layer above and in electrical contact with a transistor, forming a spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) cell stack disposed above and in electrical contact with the SHE rail, wherein the SOT-MRAM cell stack comprises a free layer, a tunnel junction layer, and a reference layer, forming a cylindrical diode structure above and in electrical contact with the SOT-MRAM cell stack, forming a write line disposed in electrical contact with the SHE rail, and forming a read line disposed above and adjacent to an outer cylindrical electrode of the diode structure.
MAGNETORESISTIVE MEMORY CELL, WRITE CONTROL METHOD AND MEMORY COMPUTING MODULE
A magnetoresistive memory cell includes a first magnetic tunnel junction, a second magnetic tunnel junction and a metal layer. The first magnetic tunnel junction and the second magnetic tunnel junction each are disposed on the metal layer; the metal layer is configured to pass write current, a projection line of an easy axis of the first magnetic tunnel junction on a plane where the metal layer is located forms a first angle against a direction of the write current, and a projection line of an easy axis of the second magnetic tunnel junction on the plane where the metal layer is located forms a second angle against a direction opposite to the direction of the write current; the first angle and the second angle are all less than 90°; the first magnetic tunnel junction and the second magnetic tunnel junction are configured to pass read current.
SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY ARRAY
A spin-orbit torque magnetoresistive random-access memory device formed by forming an array of transistors, where a column of the array includes a source line contacting the source contact of each transistor of the column, forming a spin-orbit-torque (SOT) line contacting the drain contacts of the transistors of the row, and forming an array of unit cells, each unit cell including a spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) cell stack disposed above and in electrical contact with the SOT line, where the SOT-MRAM cell stack includes a free layer, a tunnel junction layer, and a reference layer, a diode structure above and in electrical contact with the SOT-MRAM cell stack, an upper electrode disposed above and in electrical contact with the diode structure.
VOLTAGE-CONTROLLED GAIN-CELL MAGNETIC MEMORY
The present disclosure relates to a magnetic memory structure with a voltage-controlled gain-cell configuration, which includes a memory resistive device, a first transistor connected in series with the memory resistive device, and a second transistor. The memory resistive device has a baseline resistance larger than 10 MΩ, and is eligible to exhibit a ‘1’ state and a ‘0’ state and exhibit a resistance change between the ‘1’ state and the ‘0’ state. The second transistor has a gate connected to a connection node of the first transistor and the memory resistive device. When the memory resistive device exhibits the ‘1’ state, a gate voltage for the second transistor is smaller than a threshold voltage of the second transistor, and when the memory resistive device exhibits the ‘0’ state, the gate voltage for the second transistor is larger than the threshold voltage of the second transistor.
SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY
A spin-orbit torque magnetoresistive random-access memory device formed by fabricating a spin-Hall-effect (SHE) layer above and in electrical contact with a transistor, forming a spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) cell stack disposed above and in electrical contact with the SHE rail, wherein the SOT-MRAM cell stack comprises a free layer, a tunnel junction layer, a reference layer, and a diode structure, forming a write line disposed in electrical contact with the SHE rail, forming a protective dielectric layer covering a portion of the SOT-MRAM cell stack, and forming a read line disposed above and adjacent to the diode structure.
Magnetoresistance effect element and Heusler alloy
Provided are magnetoresistance effect element and a Heusler alloy in which an amount of energy required to rotate magnetization can be reduced. The magnetoresistance effect element includes a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer positioned between the first ferromagnetic layer and the second ferromagnetic layer, in which at least one of the first ferromagnetic layer and the second ferromagnetic layer is a Heusler alloy in which a portion of elements of an alloy represented by Co.sub.2Fe.sub.αZ.sub.β is substituted with a substitution element, in which Z is one or more elements selected from the group consisting of Mn, Cr, Al, Si, Ga, Ge, and Sn, α and β satisfy 2.3≤α+β, α<β, and 0.5<α<1.9, and the substitution element is an element different from the Z element and has a smaller magnetic moment than Co.
DUAL SPACER FOR DOUBLE MAGNETIC TUNNEL JUNCTION DEVICES
An approach to provide a structure of a double magnetic tunnel junction device with two spacers that includes a bottom magnetic tunnel junction stack, a spin conducting layer on the bottom magnetic tunnel junction stack, a top magnetic tunnel junction stack on the spin conduction layer, a first dielectric spacer on sides of the top magnetic tunnel junction stack and a portion of a top surface of the spin conduction layer, and a second dielectric spacer on the first spacer. The double magnetic tunnel device includes the top magnetic tunnel junction stack with a width that is less than the width of the bottom magnetic tunnel junction stack.
MAGNETIC MEMORY DEVICE
A magnetic memory device includes a conductive line extending in a first direction, a magnetic tunnel junction structure on a first surface of the conductive line, the magnetic tunnel junction structure comprising at least two magnetic patterns and a barrier pattern between the at least two magnetic patterns, and a magnetic layer on a second surface of the conductive line, which is opposite to the first surface. The magnetic layer includes magnetization components having a magnetization in a direction which is parallel to the second surface and intersects the first direction.
STACKED SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY
A spin-orbit torque magnetoresistive random-access memory device formed by fabricating a plurality of stacks of vertical magnetoresistive random-access memory (MRAM) cell stacks, each stack formed upon a different bottom electrode, each stack including: a first vertical MRAM cell stack, the first vertical MRAM cell stack disposed upon a first bottom electrode, a first metal layer disposed above and in electrical contact with the first MRAM cell stack, and a second vertical MRAM cell stack, the second MRAM cell stack disposed above and in electrical contact with the first metal layer. Further by fabricating a low resistivity layer between adjacent stacks of vertical MRAM cell stacks, the low resistivity layer in electrical contact with the spin-Hall-Effect layer of each of the adjacent stacks.