G11C13/0009

Lithography for editable atomic-scale devices and memories

An atomic orbital based memory storage is provided that includes a plurality of surface atoms forming dangling bonds (DBs) and a subset of the plurality of surface atoms passivated with spatial control to form covalent bonds with hydrogen, deuterium, or a combination thereof. The atomic orbital based data storage that can be rewritten and corrected as needed. The resulting data storage is also archival and capable of high data densities than any known storage as the data is retained in a binary storage or a given orbital being passivated or a dangling bond (DB). A method of forming and reading the atomic orbital data storage is also provided. The method including selectively removing covalent bonds to form dangling bonds (DBs) extending from a surface atom by hydrogen lithography and imaging the covalent bonds spatially to read the atomic orbital data storage.

LITHOGRAPHY FOR EDITABLE ATOMIC-SCALE DEVICES AND MEMORIES

An atomic orbital based memory storage is provided that includes a plurality of surface atoms forming dangling bonds (DBs) and a subset of the plurality of surface atoms passivated with spatial control to form covalent bonds with hydrogen, deuterium, or a combination thereof. The atomic orbital based data storage that can be rewritten and corrected as needed. The resulting data storage is also archival and capable of high data densities than any known storage as the data is retained in a binary storage or a given orbital being passivated or a dangling bond (DB). A method of forming and reading the atomic orbital data storage is also provided. The method including selectively removing covalent bonds to form dangling bonds (DBs) extending from a surface atom by hydrogen lithography and imaging the covalent bonds spatially to read the atomic orbital data storage.

Bayesian network in memory

Apparatuses and methods can be related to implementing a Bayesian neural network in a memory. A Bayesian neural network can be implemented utilizing a resistive memory array. The memory array can comprise programmable memory cells that can be programed and used to store weights of the Bayesian neural network and perform operations consistent with the Bayesian neural network.

Low read current architecture for memory

A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage differential between a memory state and a reference level is assured.

Low-power sensor memory

A sensor system includes a sensor configured to measure a parameter. The sensor system also includes a memory configured to record one or more occurrences when the parameter is outside of a predetermined range. The memory includes a wire, a counter-electrode, and an electrolyte.

Two-terminal reversibly switchable memory device

A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.

Enhanced erasing of two-terminal memory
09805794 · 2017-10-31 · ·

Two-terminal memory can be set to a first state (e.g., conductive state) in response to a program pulse, or set a second state (e.g., resistive state) in response to an erase pulse. These pulses generally provide a voltage difference between the two terminals of the memory cell. Certain electrical characteristics associated with the pulses can be manipulated in order to enhance the efficacy of the pulse. For example, the pulse can be enhanced or improved to reduce power-consumption associated with the pulse, reduce a number of pulses used to successfully set the state of the memory cell, reduce wear or damage to the memory cell, or to improve Ion or Ioff distribution associated with changing the state of the memory cell.

Two-terminal reversibly switchable memory device

A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.

VOLTAGE-CONTROLLED RESISTIVE DEVICES

Systems, methods, and apparatus are provided for tuning a memristive property of a device. The device (500) includes a layer of a dielectric material (507) disposed over and forming an interface with a layer of an electrically conductive material (506), and a gate electrode (508) disposed over the dielectric material. The dielectric material layer includes at least one ionic species (302) having a high ion mobility. The electrically conductive material is configured such that a potential difference applied to the device can cause the at least one ionic species to migrate reversibly across the interface into or out of the electrically conductive material layer, to modify the resistive state of the electrically conductive material layer.

Electrically actuated switch

An electrically actuated switch comprises a first electrode, a second electrode, and an active region disposed therebetween. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). Methods of operating the switch are also provided.