An Input/Output (I/O) circuit for a memory device is provided. The I/O circuit includes a charge integration circuit coupled to a bitline of the memory device. The charge integration circuit provides a sensing voltage based on a decrease of a voltage on the bitline. A comparator is coupled to the charge integration circuit. The comparator compares the sensing voltage with a reference voltage and provides an output voltage based on the comparison. A time-to-digital converter coupled to the comparator. The time-to-digital convertor converts a time associated with the output voltage to a digital value.

A memory device includes a memory array and a frequency-to-voltage converter. The memory array includes a plurality of memory cells arranged in rows and columns, and gates of the memory cells in the same row are coupled to each other and connected to a word line. The frequency-to-voltage converter coupled between the word line and a clock signal source outside the memory device receives a clock signal, and correspondingly outputs different voltages to the word line in accordance with the frequency of the clock signal.

An analog current memory circuit includes a ramp current generator producing a ramp current; a storage transistor, a write-enable transistor, a charge pump transistor, a clock generator producing a clock signal having a first state and a second state, a comparator electrically coupled to the storage transistor and the ramp current generator, a controller electrically coupled to the comparator and the clock generator, and a switch electrically coupled to the controller and the ramp current generator. During the write phase, the controller produces a write-enable signal to turn on the write-enable transistor to produce a stored current in the storage transistor, the stored current being substantially equal to an input current to the analog current memory circuit. During the compensation phase, the switch electrically couples the ramp current generator and the storage transistor to the comparator.

A memory device includes a memory array and a frequency-to-voltage converter. The memory array includes a plurality of memory cells arranged in rows and columns, and gates of the memory cells in the same row are coupled to each other and connected to a word line. The frequency-to-voltage converter coupled between the word line and a clock signal source outside the memory device receives a clock signal, and correspondingly outputs different voltages to the word line in accordance with the frequency of the clock signal.

An electronic device comprising a semiconductor memory unit that may a variable resistance element configured to be changed in its resistance value in response to current flowing through both ends thereof; an information storage unit configured to store switching frequency information corresponding to a switching frequency which minimizes an amplitude of a voltage to be applied to both ends of the variable resistance element to change the resistance value of the variable resistance element and switching amplitude information corresponding to a minimum amplitude; and a driving unit configured to generate a driving voltage with the switching frequency and the minimum amplitude in response to the switching frequency information and the switching amplitude information and apply the driving voltage to both ends of the variable resistance element.

A semiconductor device includes a memory cell; circuitry that generates a reference voltage; and a sense amplifier including a first input terminal electrically connected to the memory cell, and a second input terminal electrically connected to the circuitry. The sense amplifier obtains a value in correlation with a resistance value of the memory cell based on a comparison between a sense voltage applied to the first input terminal and the reference voltage applied to the second input terminal. The sense voltage changes at a speed in correlation with the resistance value of the memory cell. In at least part of a period during which the sense voltage changes, the circuitry causes the reference voltage to change in a direction opposite to a direction in which the sense voltage changes.