A gantry for a computed tomography device has a support structure, a pivot bearing, a rotating frame, a first braking resistor configured to electromotively brake a rotational movement of the rotating frame, and a heat conductor configured to dissipate heat from the first braking resistor. A heat conductor and a pressure duct wall are interconnected to form a heat-conductor-to-pressure-duct-wall connection that is detachable, form-fitting, planar, and thermally conductive. The heat is transferrable from the first braking resistor to the airflow via the heat conductor, the heat-conductor-to-pressure-duct-wall connection and the pressure duct wall.

A circuit protection device including a positive temperature coefficient (PTC) device and a backup fuse electrically connected in series with one another, the backup fuse comprising a quantity of solder disposed on a dielectric chip and having a melting temperature that is higher than a trip temperature of the PTC device, wherein the a surface of the dielectric chip exhibits a de-wetting characteristic relative to the solder such that, when the solder is melted, the solder draws away from the surface to create a galvanic opening in the backup fuse.

A circuit protection device including a positive temperature coefficient (PTC) device and a backup fuse electrically connected in series with one another, the backup fuse comprising a quantity of solder disposed on a dielectric chip and having a melting temperature that is higher than a trip temperature of the PTC device, wherein the a surface of the dielectric chip exhibits a de-wetting characteristic relative to the solder such that, when the solder is melted, the solder draws away from the surface to create a galvanic opening in the backup fuse.

A quench protection arrangement for a superconducting magnet is disclosed. The arrangement comprises: a superconducting magnet comprising a plurality of magnet sections; a plurality of varistors, wherein each of the plurality of varistors is electrically connected in parallel across a respective one of the plurality of magnet sections; and a heater arrangement electrically connected to the plurality of varistors and configured to apply heat to each of the plurality of magnet sections in response to a change in a voltage across any one or more of the plurality of varistors. A method of protecting a superconducting magnet is also disclosed.

A quench protection arrangement for a superconducting magnet is disclosed. The arrangement comprises: a superconducting magnet comprising a plurality of magnet sections; a plurality of varistors, wherein each of the plurality of varistors is electrically connected in parallel across a respective one of the plurality of magnet sections; and a heater arrangement electrically connected to the plurality of varistors and configured to apply heat to each of the plurality of magnet sections in response to a change in a voltage across any one or more of the plurality of varistors. A method of protecting a superconducting magnet is also disclosed.

In an embodiment a thermal protection device includes a housing, a varistor partly embedded in the housing, wherein the housing electrically insulates the varistor, and wherein the varistor includes a partly uninsulated contact surface, an inner wall of insulating material arranged adjacent to the contact surface of the varistor, a window in the inner wall configured to allow an electrical connection of the contact surface of the varistor in an operational state of the thermal protection device and a moveable insulation block configured to cover the window in the inner wall to insulate the varistor in a region of the window of the inner wall in a fault state of the thermal protection device.

In an embodiment a thermal protection device includes a housing, a varistor partly embedded in the housing, wherein the housing electrically insulates the varistor, and wherein the varistor includes a partly uninsulated contact surface, an inner wall of insulating material arranged adjacent to the contact surface of the varistor, a window in the inner wall configured to allow an electrical connection of the contact surface of the varistor in an operational state of the thermal protection device and a moveable insulation block configured to cover the window in the inner wall to insulate the varistor in a region of the window of the inner wall in a fault state of the thermal protection device.

A heat utilizing device is provided in which the thermal resistance of the wiring layer is increased while an increase in electric resistance of the wiring layer is limited. Heat utilizing device has thermistor whose electric resistance changes depending on temperature; and wiring layer that is connected to thermistor. A mean free path of phonons in wiring layer is smaller than a mean free path of phonons in an infinite medium that consists of a material of wiring layer.

Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode. The one or more external resistance terminals, the first external terminal, and the external control terminal are external connection terminals provided on a surface of the semiconductor device.

Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode. The one or more external resistance terminals, the first external terminal, and the external control terminal are external connection terminals provided on a surface of the semiconductor device.