A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

A vacuum tube for amplifier circuit includes: a light incidence window that transmits signal light; a photoelectric conversion unit that converts the signal light transmitted through the light incidence window into photoelectrons; an output unit that has an anode, on which the photoelectrons are incident, and outputs a signal corresponding to the incident photoelectrons; and a grid electrode that is disposed in a path of the photoelectrons from the photoelectric conversion unit to the anode and controls the amount of photoelectrons incident on the anode.

A vacuum tube for amplifier circuit includes: a light incidence window that transmits signal light; a photoelectric conversion unit that converts the signal light transmitted through the light incidence window into photoelectrons; an output unit that has an anode, on which the photoelectrons are incident, and outputs a signal corresponding to the incident photoelectrons; and a grid electrode that is disposed in a path of the photoelectrons from the photoelectric conversion unit to the anode and controls the amount of photoelectrons incident on the anode.

A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a plurality of grid supports disposed on the electrode, each of the plurality of grid supports having a first width; and a plurality of grid lines, each of the plurality of grid lines being supported on an associated one of the plurality of grid supports, each of the plurality of grid lines having a second width that is wider than the first width.

Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a plurality of grid supports disposed on the electrode, each of the plurality of grid supports having a first width; and a plurality of grid lines, each of the plurality of grid lines being supported on an associated one of the plurality of grid supports, each of the plurality of grid lines having a second width that is wider than the first width.

Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a plurality of grid supports disposed on the electrode, each of the plurality of grid supports having a first width; and a plurality of grid lines, each of the plurality of grid lines being supported on an associated one of the plurality of grid supports, each of the plurality of grid lines having a second width that is wider than the first width.

Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a plurality of grid supports disposed on the electrode, each of the plurality of grid supports having a first width; and a plurality of grid lines, each of the plurality of grid lines being supported on an associated one of the plurality of grid supports, each of the plurality of grid lines having a second width that is wider than the first width.