H01L21/02104

Direct additive synthesis of diamond semiconductor
11557475 · 2023-01-17 · ·

In an embodiment, a system includes a three-dimensional (3D) printer, a neutral feedstock, a p-doped feedstock, an n-doped feedstock, and a laser. The 3D printer includes a platen and an enclosure. The platen includes an inert metal. The enclosure includes an inert atmosphere. The neutral feedstock is configured to be deposited onto the platen. The neutral feedstock includes a halogenated solution and a nanoparticle having a negative electron affinity. The p-doped feedstock is configured to be deposited onto the platen. The p-doped feedstock includes a boronated compound introduced to the neutral feedstock. The n-doped feedstock is configured to be deposited onto the platen. The n-doped feedstock includes a phosphorous compound introduced to the neutral feedstock. The laser is configured to induce the nanoparticle to emit solvated electrons into the halogenated solution to form, by reduction, layers of a ceramic comprising a neutral layer, a p-doped layer, and an n-doped layer.

Millimeter wave antenna and EMI shielding integrated with fan-out package
11710888 · 2023-07-25 · ·

Systems and methods of manufacture are disclosed for a semiconductor device assembly having a semiconductor device having a first side and a second side opposite of the first side, a mold compound region adjacent to the semiconductor device, a redistribution layer adjacent to the first side of the semiconductor device, a dielectric layer adjacent to the second side of the semiconductor device, a first via extending through the mold compound region that connects to at least one trace in the dielectric layer, and an antenna structure formed on the dielectric layer and connected to the semiconductor device through the first via.

Method of fabricating a display apparatus

A display apparatus may include a base substrate including a first portion and a second portion smaller than the first portion, a plurality of pixels disposed on the first portion, a protection substrate disposed below the base substrate, and a groove disposed in a portion of the protection substrate and overlapped with the second portion. The groove may include a first region extending in a first direction, and a second region and a third region, which are arranged along the first direction, wherein the first region is interposed between the second region and the third region. The first and second portions may be arranged in a second direction crossing the first direction, and a width of each of the second and third regions may be larger than a first width of the first region, when measured in the second direction.

HEAT TREATMENT DEVICE AND TREATMENT METHOD
20230020235 · 2023-01-19 ·

A heat treatment device includes: a heating plate configured to support and heat a substrate on which a resist film is formed; a chamber configured to cover a processing space above the heating plate; a gas supply configured to supply a gas into the chamber along a gas flow path connected to an inside of the chamber, the gas flow path beginning from an outer periphery of the heating plate and extending along an upper surface of the heating toward an end portion on an outer periphery of the substrate; and an exhaust port configured to evacuate inside of the chamber through exhaust holes that are formed above the processing space and open downwards.

Optical adjustable filter sub-assembly
11550170 · 2023-01-10 · ·

A method may include thinning a silicon wafer to a particular thickness. The particular thickness may be based on a passband frequency spectrum of an adjustable optical filter. The method may also include covering a surface of the silicon wafer with an optical coating. The optical coating may filter an optical signal and may be based on the passband frequency spectrum. The method may additionally include depositing a plurality of thermal tuning components on the coated silicon wafer. The plurality of thermal tuning components may adjust a passband frequency range of the adjustable optical filter by adjusting a temperature of the coated silicon wafer. The passband frequency range may be within the passband frequency spectrum. The method may include dividing the coated silicon wafer into a plurality of silicon wafer dies. Each silicon wafer die may include multiple thermal tuning components and may be the adjustable optical filter.

Evaluation method of metal contamination

A method of evaluating metal contamination by measuring the amount of metal contaminants to a silicon wafer in a rapid thermal processing apparatus includes steps of obtaining a Si single crystal grown by the Czochralski method at a pulling rate of 1.0 mm/min or lower, the crystal having oxygen concentration of 1.3×10.sup.18 atoms/cm.sup.3 or less, slicing silicon wafers from the Si single crystal except regions of 40 mm toward the central portion from the head of the single crystal and 40 mm toward the central portion from the tail, heat-treating the silicon wafer with a rapid thermal processing apparatus and transferring contaminants from members in a furnace of the rapid thermal processing apparatus to the silicon wafer, and measuring a lifetime of the silicon wafer to which contaminants are transferred.

LOW TEMPERATURE GRAPHENE GROWTH

Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.

Chemistry compatible coating material for advanced device on-wafer particle performance

A chamber component comprises a body and a plasma sprayed ceramic coating on the body. The plasma sprayed ceramic coating is applied using a method that includes feeding powder comprising a yttrium oxide containing solid solution into a plasma spraying system, wherein the powder comprises a majority of donut-shaped particles, each of the donut-shaped particles having a spherical body with indentations on opposite sides of the spherical body. The method further includes plasma spray coating the body to apply a ceramic coating onto the body, wherein the ceramic coating comprises the yttrium oxide containing solid solution, wherein the donut-shaped particles cause the ceramic coating to have an improved morphology and a decreased porosity as compared to powder particles of other shapes, wherein the improved surface morphology comprises a reduced amount of surface nodules.

Semiconductor devices

A semiconductor device includes a substrate and a semiconductor layer. The substrate includes a planar portion and a plurality of pillars on a periphery of the planar portion. The pillars are shaped as rectangular columns, and corners of two of the pillars at the same side of the planar portion are aligned in a horizontal direction or a direction perpendicular to the horizontal direction. The semiconductor layer is disposed over the planar portion and between the pillars.

METHOD OF FORMING SIOC AND SIOCN LOW-K SPACERS
20230162971 · 2023-05-25 ·

Methods for depositing SiOC and SiOCN films are disclosed. Exemplary methods utilize precursors containing iodine and alkoxide, and can be used to form low-k spacers using O-free PEALD.