A device die including a first semiconductor die, a second semiconductor die, an anti-arcing layer and a first insulating encapsulant is provided. The second semiconductor die is stacked over and electrically connected to the first semiconductor die. The anti-arcing layer is in contact with the second semiconductor die. The first insulating encapsulant is disposed over the first semiconductor die and laterally encapsulates the second semiconductor die. Furthermore, methods for fabricating device dies are provided.

Disclosed are an electronic device and a manufacturing method of an electronic device. The manufacturing method includes the following. A first substrate is provided. The first substrate includes a plurality of chips. A second substrate is provided. A transfer process is performed to sequentially transfer a first chip and a second chip among the chips to the second substrate. The second chip is adjacent to the first chip. A first angle is between a first extension direction of a first side of the first chip and an extension direction of a first boundary of the second substrate. A second angle is between a second extension direction of a second side of the second chip and the extension direction of the first boundary of the second substrate. The first angle is different from the second angle.

Discussed is an apparatus and a method of manufacturing a display using a micro light emitting diode (LED). A method of manufacturing a display device using a light emitting element includes providing a substrate having an individual pixel position defined by a pair of assembly electrodes; moving the light emitting element including a magnetic body on to the substrate using a magnetic chuck having an electromagnet; assembling the light emitting element at the individual pixel position using the magnetic chuck; and recovering a remaining light emitting element which is not assembled at the individual pixel position using the magnetic chuck.

A hybrid embedded packaging structure and a manufacturing method thereof are disclosed. The structure includes: a substrate with a first insulating layer, a conductive copper column, a chip-embedded cavity and a first circuit layer; a first electronic device arranged inside the chip-embedded cavity; a second electronic device arranged on a back surface of the first electronic device; a second insulating layer covering and filling the chip-embedded cavity and an upper layer of the substrate, exposing part of the first circuit layer and a back surface of part of the second electronic device or part of the first electronic device; a second circuit layer electrically connected with the conductive copper column and a terminal of the first electronic device; a conducting wire electrically connecting the first circuit layer with a terminal of the second electronic device; and a protection cover arranged on the top surface of the substrate.

A protective member forming apparatus includes a resin film adhering unit which causes a resin film to adhere to a front surface of a substrate so as to conform to recesses and projections on the front surface of the substrate, a support table which supports the substrate, a liquid resin supplying unit which supplies a curable liquid resin, a pressing unit which covers the liquid resin supplied to the resin film with a cover film and presses the cover film by a pressing surface to spread the liquid resin over the resin film, and a curing unit which cures the liquid resin being spread. The support table includes an annular bank region having a height not exceeding a thickness of the substrate and housing the substrate therein, and the bank region prevents the liquid resin to be spread by the pressing unit from flowing out from the substrate.

A semiconductor structure and a manufacturing method thereof are provided. The method includes the following steps. A plurality of conductive balls is placed over a circuit substrate, where each of the conductive balls is placed over a contact area of one of a plurality of contact pads that is accessibly revealed by a patterned mask layer. The conductive balls are reflowed to form a plurality of external terminals with varying heights connected to the contact pads of the circuit substrate, where a first external terminal of the external terminals formed in a first region of the circuit substrate and a second external terminal of the external terminals formed in a second region of the circuit substrate are non-coplanar.

Micro light-emitting diodes (LED) are distanced from a mirror layer that reflects light emitted by the LEDs to increase the light extraction efficiency of the LEDs. In some embodiments, micro LEDs are electrically coupled to the mirror layer by vias positioned at an end of the LED positioned proximate to the mirror layer. In other embodiments, a conductive layer is positioned adjacent to an electrode of multiple micro LEDs and a pillar contacts the conductive layer at a location where the conductive layer is not positioned adjacent to a micro LED electrode. Vias and pillars allow the mirror height to be increased relative to structures where micro LEDs extend into a mirror layer. Increasing the mirror height can reduce the amount of destructive interference at a release layer caused by reflections of LED-emitted light by the mirror layer when the release layer is ablated via laser irradiation.

A semiconductor package includes a redistribution structure including an insulating layer and a redistribution layer on the insulating layer, and having a first surface and a second surface opposing the first surface, and an under-bump metal (UBM) structure including an UBM pad protruding from the first surface of the redistribution structure, and an UBM via penetrating through the insulating layer and connecting the redistribution layer and the UBM pad. A lower surface of the UBM via has a first area in contact with the UBM pad, and a second area having a step configuration relative to the first area and that extends outwardly of the first area.

A substrate debonding apparatus configured to separate a support substrate attached to a first surface of a device substrate by an adhesive layer, the substrate debonding apparatus including a substrate chuck configured to support a second surface of the device substrate, the second surface being opposite to the first surface of the device substrate; a light irradiator configured to irradiate light to an inside of the adhesive layer; and a mask between the substrate chuck and the light irradiator, the mask including an opening through which an upper portion of the support substrate is exposed, and a first cooling passage or a second cooling passage, the first cooling passage being configured to provide a path in which a coolant is flowable, the second cooling passage being configured to provide a path in which air is flowable and to provide part of the air to a central portion of the opening.

A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.