A display device with high design flexibility is provided. The display device includes a display element, a touch sensor, and a transistor between two flexible substrates. An external electrode that supplies a signal to the display element and an external electrode that supplies a signal to the touch sensor are connected from the same surface of one of the substrates.

A display device with high design flexibility is provided. The display device includes a display element, a touch sensor, and a transistor between two flexible substrates. An external electrode that supplies a signal to the display element and an external electrode that supplies a signal to the touch sensor are connected from the same surface of one of the substrates.

A display device with high design flexibility is provided. The display device includes a display element, a touch sensor, and a transistor between two flexible substrates. An external electrode that supplies a signal to the display element and an external electrode that supplies a signal to the touch sensor are connected from the same surface of one of the substrates.

A display device with high design flexibility is provided. The display device includes a display element, a touch sensor, and a transistor between two flexible substrates. An external electrode that supplies a signal to the display element and an external electrode that supplies a signal to the touch sensor are connected from the same surface of one of the substrates.

In one exemplary aspect, the present disclosure is directed to a method for lithography patterning. The method includes providing a substrate and forming a target layer over the substrate. A patterning layer is formed by depositing a first layer having an organic composition having a composition including at least 50 atomic percentage carbon; depositing a second layer including silicon; and depositing a photosensitive layer on the second layer. In some implementations, the first layer is deposited by ALD, CVD, or PVD processes.

A method of manufacturing a semiconductor package includes forming a first redistribution structure, forming a plurality of conductive pillars on the first redistribution structure, mounting the first semiconductor chip on the first redistribution structure, forming an encapsulant configured to cover an upper surface of the first redistribution structure, the plurality of conductive pillars, and the first semiconductor chip, planarizing the encapsulant, exposing the plurality of conductive pillars by forming an opening in the planarized encapsulant, and forming a second redistribution structure connected to the plurality of conductive pillars on the first semiconductor chip and the encapsulant. Upper surfaces of the plurality of conductive pillars are located at a lower level than the upper surface of the first semiconductor chip, and an upper surface of a connection via included in the second redistribution structure has a width greater than a width of a lower surface of the connection via.

A method of manufacturing a semiconductor package includes forming a first redistribution structure, forming a plurality of conductive pillars on the first redistribution structure, mounting the first semiconductor chip on the first redistribution structure, forming an encapsulant configured to cover an upper surface of the first redistribution structure, the plurality of conductive pillars, and the first semiconductor chip, planarizing the encapsulant, exposing the plurality of conductive pillars by forming an opening in the planarized encapsulant, and forming a second redistribution structure connected to the plurality of conductive pillars on the first semiconductor chip and the encapsulant. Upper surfaces of the plurality of conductive pillars are located at a lower level than the upper surface of the first semiconductor chip, and an upper surface of a connection via included in the second redistribution structure has a width greater than a width of a lower surface of the connection via.

A method of manufacturing a semiconductor package includes forming a first redistribution structure, forming a plurality of conductive pillars on the first redistribution structure, mounting the first semiconductor chip on the first redistribution structure, forming an encapsulant configured to cover an upper surface of the first redistribution structure, the plurality of conductive pillars, and the first semiconductor chip, planarizing the encapsulant, exposing the plurality of conductive pillars by forming an opening in the planarized encapsulant, and forming a second redistribution structure connected to the plurality of conductive pillars on the first semiconductor chip and the encapsulant. Upper surfaces of the plurality of conductive pillars are located at a lower level than the upper surface of the first semiconductor chip, and an upper surface of a connection via included in the second redistribution structure has a width greater than a width of a lower surface of the connection via.

A display device with high design flexibility is provided. The display device includes a display element, a touch sensor, and a transistor between two flexible substrates. An external electrode that supplies a signal to the display element and an external electrode that supplies a signal to the touch sensor are connected from the same surface of one of the substrates.

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first insulating layer is formed over a first surface of the encapsulant and an active surface of the semiconductor die. A second insulating layer is formed over a second surface of the encapsulant opposite the first surface. A conductive layer is formed over the first insulating layer. The conductive layer includes a line-pitch or line-spacing of less than 5 m. The active surface of the semiconductor die is recessed within the encapsulant. A third insulating layer is formed over the semiconductor die including a surface of the third insulating layer coplanar with a surface of the encapsulant. The second insulating layer is formed prior to forming the conductive layer. A trench is formed in the first insulating layer. The conductive layer is formed within the trench.