H01L2224/05027

Semiconductor device

Disclosed is a semiconductor device including a conductive pattern on a substrate, a passivation layer on the substrate and including an opening that partially exposes the conductive pattern, and a pad structure in the opening of the passivation layer and connected to the conductive pattern. The pad structure includes a first metal layer that fills the opening of the passivation layer and has a width greater than that of the opening, and a second metal layer on the first metal layer. The first metal layer has a first thickness at an outer wall of the first metal layer, a second thickness on a top surface of the passivation layer, and a third thickness on a top surface of the conductive pattern. The second thickness is greater than the first thickness, and the third thickness is greater than the second thickness.

DISPLAY DEVICE AND TILED DISPLAY DEVICE
20230238400 · 2023-07-27 ·

Provided are a display device and a tiled display device. The display device according to one or more embodiments includes a substrate, transistors above the substrate, a first organic insulating layer above the transistors, a first connection electrode above the first organic insulating layer, and electrically connected to at least one of the transistors, a second connection electrode above the first organic insulating layer, a first power supply line configured to receive a first power voltage, above the first organic insulating layer, and connected to the second connection electrode, and a second organic insulating layer above the first power supply line, and defining an opening area exposing the first power supply line.

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

DISPLAY APPARATUS
20230215856 · 2023-07-06 ·

A display apparatus includes: a circuit substrate; and a pixel array on the circuit substrate and including a plurality of pixels. The pixel array includes: light emitting diode (LED) cells constituting the plurality of pixels, each of the LED cells including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer; wavelength converters on the LED cells; an upper semiconductor layer on the LED cells and having a partition structure; a passivation layer on side surfaces of the LED cells; a first electrode along a region of the LED cells to have a grid shape; second electrodes connected to the second conductivity-type semiconductor layers; and reflective layers between the first electrode and the second electrode along the passivation layer on the side surfaces of the LED cells and having surfaces inclined toward outside of the LED cells.

Apparatus and method of manufacturing solder bump

An apparatus for forming a solder bump on a substrate including a supporter configured to support the substrate to be provided thereon, a housing surrounding the supporter, a cover defining a manufacturing space in combination with the housing and including an edge heating zone along a perimeter thereof, the manufacturing space surrounding the supporter, and an oxide remover supply nozzle configured to supply an oxide remover to the manufacturing space may be provided.

Semiconductor device bonding area including fused solder film and manufacturing method
11545452 · 2023-01-03 · ·

A semiconductor device including a semiconductor substrate including an electrode; a wire connected to the electrode; a first insulating film including a first opening that partially exposes the wire; a base portion that is connected to a portion of the wire exposed via the first opening, and that includes a conductor including a recess corresponding to the first opening; and a solder film on a surface of the base portion. Solder included in the solder film is fused by a first heat treatment, and the recess is filled with the fused solder.

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
20220399319 · 2022-12-15 ·

A display device includes an array substrate, a plurality of mounting electrodes provided to the array substrate, a columnar conductor for coupling provided to each of the mounting electrodes, a plurality of light-emitting elements provided to the array substrate, a first electrode and a second electrode provided to a surface of each of the light-emitting elements facing the array substrate, the first electrode being coupled to one of an anode and a cathode of the light-emitting element, the second electrode being coupled to the other of the anode and the cathode of the light-emitting element, and a coupling member covering each of the first electrode and the second electrode. The columnar conductor is made of material harder than the coupling member, and an end of the columnar conductor on the light-emitting element side is electrically coupled to the coupling member.

Wiring board

A wiring board includes: an insulating layer; and a connection terminal formed on the insulating layer. The connection terminal includes a first metal layer laminated on the insulating layer, a second metal layer laminated on the first metal layer, a metal pad laminated on the second metal layer, and a surface treatment layer that covers an upper surface and a side surface of the pad and that is in contact with the upper surface of the insulating layer. An end portion of the second metal layer is in contact with the surface treatment layer, and an end portion of the first metal layer is positioned closer to a center side of the pad than the end portion of the second metal layer is to form a gap between the end portion of the first metal layer and the surface treatment layer.

SEMICONDUCTOR DEVICE
20220392858 · 2022-12-08 ·

There is provided a semiconductor device including: a pad portion that is provided above the upper surface of the semiconductor substrate and that is separated from the emitter electrode; a wire wiring portion that is connected to a connection region on an upper surface of the pad portion; a wiring layer that is provided between the semiconductor substrate and the pad portion and that includes a region overlapping the connection region; an interlayer dielectric film that is provided between the wiring layer and the pad portion and that has a through hole below the connection region; a tungsten portion that contains tungsten and that is provided inside the through hole and electrically connects the wiring layer and the pad portion; and a barrier metal layer that contains titanium and that is provided to cover an upper surface of the interlayer dielectric film below the connection region.