Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/10
Bump connectors; Manufacturing methods related thereto
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H01L2224/115
by chemical or physical modification of a pre-existing or pre-deposited material
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H01L2224/11552
using a laser or a focussed ion beam [FIB]
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H01L2224/11554
Stereolithography, i.e. solidification of a pattern defined by a laser trace in a photosensitive resin
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H01L2224/11554

MANUFACTURE OF ELECTRONIC CHIPS
20220375840 · 2022-11-24 · ·

The present disclosure relates to an electronic chip comprising a semiconductor substrate carrying at least one metal contact extending, within the thickness of the substrate, along at least one flank of the chip.

METHOD AND PROCESS FOR EMIB CHIP INTERCONNECTIONS
20170018525 · 2017-01-19 ·

A method for attaching an integrated circuit (IC) to an IC package substrate includes forming a solder bump on a bond pad of an IC die, forming a solder-wetting protrusion on a bond pad of an IC package substrate, and bonding the solder bump of the IC die to the solder-wetting protrusion of the IC package substrate.

METHOD AND PROCESS FOR EMIB CHIP INTERCONNECTIONS
20170018525 · 2017-01-19 ·

A method for attaching an integrated circuit (IC) to an IC package substrate includes forming a solder bump on a bond pad of an IC die, forming a solder-wetting protrusion on a bond pad of an IC package substrate, and bonding the solder bump of the IC die to the solder-wetting protrusion of the IC package substrate.