Patent classifications
H01L2224/12
Semiconductor device with decreased warpage and method of fabricating the same
A semiconductor device package includes a substrate having a first surface and a second surface facing away from the first surface, a conductive column extending in the substrate between the first surface and the second surface, a dielectric layer on the first surface of the substrate, a redistribution structure provided in the dielectric layer and electrically connected to the conductive column, a semiconductor chip provided above the dielectric layer and electrically connected to the redistribution structure, and an encapsulation layer on the dielectric layer and encapsulating the semiconductor chip. The package is manufactured such that each of the substrate and the encapsulation layer is formed of molding compound.
SEMCONDUCTOR DEVICE PACKAGE AND METHOD OF FABRICATING THE SAME
A semiconductor device package includes a substrate having a first surface and a second surface facing away from the first surface, a conductive column extending in the substrate between the first surface and the second surface, a dielectric layer on the first surface of the substrate, a redistribution structure provided in the dielectric layer and electrically connected to the conductive column, a semiconductor chip provided above the dielectric layer and electrically connected to the redistribution structure, and an encapsulation layer on the dielectric layer and encapsulating the semiconductor chip. The package is manufactured such that each of the substrate and the encapsulation layer is formed of molding compound.
Semiconductor device package with warpage prevention
A semiconductor device package includes a substrate having a first surface and a second surface facing away from the first surface, a conductive column extending in the substrate between the first surface and the second surface, a dielectric layer on the first surface of the substrate, a redistribution structure provided in the dielectric layer and electrically connected to the conductive column, a semiconductor chip provided above the dielectric layer and electrically connected to the redistribution structure, and an encapsulation layer on the dielectric layer and encapsulating the semiconductor chip. The package is manufactured such that each of the substrate and the encapsulation layer is formed of molding compound.
Display device having the bumps in the middle zone parallel to the reference line
A display device and chip bonding method thereof are provided. The display device includes a flexible display panel and a chip bonded to the non-display area of the flexible display panel with the extension directions of individual bumps satisfying, depending on the area in which the bumps are located, the following requirements: in each row of bumps, at least the individual bumps in lateral zones have their extension lines on the same side converging at a same point on the reference line, and the two bumps belong to a same bump group have their extension lines respectively forming an angle with respect to the reference line, the angles being equal to each other.
SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF FABRICATING THE SAME
A semiconductor device package includes a substrate having a first surface and a second surface facing away from the first surface, a conductive column extending in the substrate between the first surface and the second surface, a dielectric layer on the first surface of the substrate, a redistribution structure provided in the dielectric layer and electrically connected to the conductive column, a semiconductor chip provided above the dielectric layer and electrically connected to the redistribution structure, and an encapsulation layer on the dielectric layer and encapsulating the semiconductor chip. The package is manufactured such that each of the substrate and the encapsulation layer is formed of molding compound.
DISPLAY DEVICE AND CHIP BONDING METHOD THEREOF
A display device and chip bonding method thereof are provided. The display device includes a flexible display panel and a chip bonded to the non-display area of the flexible display panel with the extension directions of individual bumps satisfying, depending on the area in which the bumps are located, the following requirements: in each row of bumps, at least the individual bumps in lateral zones have their extension lines on the same side converging at a same point on the reference line, and the two bumps belong to a same bump group have their extension lines respectively forming an angle with respect to the reference line, the angles being equal to each other.