A light-emitting element including: a first semiconductor layer doped with a first type of dopant; a second semiconductor layer doped with a second type of dopant that is different from the first type of dopant; and an active layer between the first semiconductor layer and the second semiconductor layer, wherein a length of the light-emitting element measured in a first direction, which may be a direction in which the first semiconductor layer, the active layer, and the second semiconductor layer may be arranged, may be shorter than the width measured in a second direction that is perpendicular to the first direction.

A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

A method for producing a document structure, wherein the method includes producing a chip structure by forming a cavity in a carrier having a top side and an under side, picking up a chip having at least one chip contact and a redistribution layer (RDL) connected to the at least one chip contact by means of a picking-up device detaching the chip from an auxiliary carrier, wherein the chip bears on the auxiliary carrier by way of the RDL, wherein the chip is lifted up from the auxiliary carrier by means of pressure being exerted on the RDL, wherein the lifted-up chip is picked up and inserted into the cavity, and wherein the RDL is oriented on the top side of the carrier, fixing the chip in the cavity by means of an adhesive, electrically conductively connecting the at least one chip contact of the RDL to an electrically conductive region of the carrier by means of an electrically conductive material, and embedding the carrier between a first paper layer and a second paper layer.

A semiconductor package structure includes a chip, a conductive pillar, a dielectric layer, a first patterned conductive layer and a second patterned conductive layer. The chip has a first side with at least a first metal electrode pad and a second side with at least a second metal electrode pad. The conductive pillar, which has a first end and a second end, is disposed adjacent to the chip. The axis direction of the conductive pillar is parallel to the height direction of the chip. The dielectric layer covers the chip and the conductive pillar and exposes the first and second metal electrode pads of the chip and the first and second ends of the conductive pillar. The first patterned conductive layer is disposed on a second surface of the dielectric layer and electrically connected between the second metal electrode pad and the second end of the conductive pillar. The second patterned conductive layer is disposed on a first surface of the dielectric layer and electrically connected between the first metal electrode pad and the first end of the conductive pillar.

A wireless transmission module, chips, a passive component, and a coil are integrated into an integral structure, so that an integration level of the wireless transmission module is improved. In addition, the integral structure can effectively implement independence of the module, and the independent module can be flexibly arranged inside structural design of an electronic device, and does not need to be disposed on a mainboard of the electronic device. Only an input terminal of the wireless transmission module needs to be retained on the mainboard of the electronic device. In addition, the integral structure can further effectively increase a capability of a product for working continuously and normally in an extremely harsh scenario, and improve product reliability. In addition, in the structure of the wireless transmission module, the chips and the coil are integrated, and signal transmission paths between the chips and the coil are relatively short.

An integrated radar circuit comprising: a first substrate, of a first semiconductor material, said first substrate comprising an integrated transmit and receive radar circuit; a second substrate, of a second semiconductor material, said second substrate comprising at least on through-substrate cavity having cavity walls; at least one discrete transistor chip, of a third semiconductor material, said at least one discrete transistor chip having chip walls and being held in said at least one through-substrate cavity by a metal filling extending from at least one cavity wall to at least one chip wall; a conductor on said second substrate, electrically connecting a portion of said integrated transmit and receive radar circuit to a discrete transistor on said at least one discrete transistor chip.

An electronic assembly comprising a carrier wafer having a top wafer surface and a bottom wafer surface; an electronic integrated circuit being formed in the carrier wafer and comprising an integrated circuit contact pad on the top wafer surface; said carrier wafer comprising a through-wafer cavity having walls that join said top wafer surface to said bottom wafer surface; a component chip having a component chip top surface, a component chip bottom surface and component chip side surfaces, the component chip being held in said through-wafer cavity by direct contact of at least a side surface of said component chip with an attachment metal that fills at least a portion of said through-wafer cavity; said component chip comprising at least one component contact pad on said component chip bottom surface; and a conductor connecting said integrated circuit contact pad and said component contact pad.

A package structure including IPD and method of forming the same are provided. The package structure includes a die, an encapsulant laterally encapsulating the die, a first RDL structure disposed on the encapsulant and the die, an IPD disposed on the first RDL structure and an underfill layer. The IPD includes a substrate, a first connector on a first side of the substrate and electrically connected to the first RDL structure, a guard structure on a second side of the substrate opposite to the first side and laterally surrounding a connector region, and a second connector disposed within the connector region and electrically connected to a conductive via embedded in the substrate. The underfill layer is disposed to at least fill a space between the first side of the IPD and the first RDL structure. The underfill layer is separated from the connector region by the guard structure.

An integrated fan out package is utilized in which the dielectric materials of different redistribution layers are utilized to integrate the integrated fan out package process flows with other package applications. In some embodiments an Ajinomoto or prepreg material is utilized as the dielectric in at least some of the overlying redistribution layers.

A semiconductor package includes a first die; a first redistribution structure over the first die, the first redistribution structure being conterminous with the first die; a second die over the first die, a first portion of the first die extending beyond a lateral extent of the second die; a conductive pillar over the first portion of the first die and laterally adjacent to the second die, the conductive pillar electrically coupled to first die; a molding material around the first die, the second die, and the conductive pillar; and a second redistribution structure over the molding material, the second redistribution structure electrically coupled to the conductive pillar and the second die.