A method of manufacturing a semiconductor device, the method including: preparing an insulated circuit substrate including a conductive plate; partially fixing a plate-like bonding member onto the conductive plate so as to make a positioning of the bonding member in a horizontal direction; mounting a semiconductor chip on the bonding member; and heating and melting the bonding member so as to form a bonding layer for bonding the insulated circuit substrate and the semiconductor chip each other.

A method of manufacturing a semiconductor device, the method including: preparing an insulated circuit substrate including a conductive plate; partially fixing a plate-like bonding member onto the conductive plate so as to make a positioning of the bonding member in a horizontal direction; mounting a semiconductor chip on the bonding member; and heating and melting the bonding member so as to form a bonding layer for bonding the insulated circuit substrate and the semiconductor chip each other.

In some embodiments, the present disclosure relates to a package assembly having a bump on a first substrate. A molding compound is on the first substrate and contacts sidewalls of the bump. A no-flow underfill layer is on a conductive region of a second substrate. The no-flow underfill layer and the conductive region contact the bump. A mask layer is arranged on the second substrate and laterally surrounds the no-flow underfill layer. The no-flow underfill layer contacts the substrate between the conductive region and the mask layer.

In some embodiments, the present disclosure relates to a package assembly having a bump on a first substrate. A molding compound is on the first substrate and contacts sidewalls of the bump. A no-flow underfill layer is on a conductive region of a second substrate. The no-flow underfill layer and the conductive region contact the bump. A mask layer is arranged on the second substrate and laterally surrounds the no-flow underfill layer. The no-flow underfill layer contacts the substrate between the conductive region and the mask layer.

A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

A semiconductor manufacturing apparatus includes a thrust-up unit having a plurality of blocks in contact with a dicing tape, a head having a collet absorbing the die and capable of being moved up and down, and a control section controlling the operation of the thrust-up unit and the head. The thrust-up unit can operate each of the plurality of blocks independently. The control section configures the thrust-up sequences of the plurality of blocks in a plurality of steps, and controls the operation of the plurality of blocks on the basis of a time chart recipe capable of setting the height and the speed of the plurality of blocks for each block and in each step.

In one embodiment, methods for making semiconductor devices are disclosed.

In one embodiment, methods for making semiconductor devices are disclosed.

A die placement system provides a tip body and die placement head to ensure planarity of a die to substrate without the need for calibration prior to each pick and place operation. A self-aligning tip incorporated into a tip body aids in die placement/attachment. This tip provides for global correction of planarity errors that exist between a die and substrate, regardless of whether those errors stem from gantry (i.e. die-side misalignment) or machine deck tool (i.e. substrate-side misalignment) misalignment.