H01L2224/29395

Compressible foamed thermal interface materials and methods of making the same

Disclosed are exemplary embodiments of compressible foamed thermal interface materials. Also disclosed are methods of making and using compressible foamed thermal interface materials.

Compressible foamed thermal interface materials and methods of making the same

Disclosed are exemplary embodiments of compressible foamed thermal interface materials. Also disclosed are methods of making and using compressible foamed thermal interface materials.

Semiconductor device and semiconductor device package

A semiconductor device according to the embodiment may include a light emitting structure including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer; a first bonding pad disposed on the light emitting structure and electrically connected to the first conductivity type semiconductor layer; a second bonding pad disposed on the light emitting structure and spaced apart from the first bonding pad, and electrically connected to the second conductivity type semiconductor layer; and a reflective layer disposed on the light emitting structure and disposed between the first bonding pad and the second bonding pad. According to the semiconductor device of the embodiment, each of the first bonding pad and the second bonding pad includes a porous metal layer having a plurality of pores and a bonding alloy layer disposed on the porous metal layer.

Methods of forming power electronic assemblies using metal inverse opal structures and encapsulated-polymer spheres

A method of forming a bonding assembly that includes positioning a plurality of polymer spheres against an opal structure and placing a substrate against a second major surface of the opal structure. The opal structure includes the first major surface and the second major surface with a plurality of voids defined therebetween. The plurality of polymer spheres encapsulates a solder material disposed therein and contacts the first major surface of the opal structure. The method includes depositing a material within the voids of the opal structure and removing the opal structure to form an inverse opal structure between the first and second major surfaces. The method further includes removing the plurality of polymer spheres to expose the solder material encapsulated therein and placing a semiconductor device onto the inverse opal structure in contact with the solder material.

SUBSTRATE BONDING STRUCTURE AND SUBSTRATE BONDING METHOD
20200365473 · 2020-11-19 · ·

A device (2) is formed on a main surface of a substrate (1). The main surface of the substrate (1) is bonded to the undersurface of the counter substrate (14) via the bonding member (11,12,13) in a hollow state. A circuit (17) and a bump structure (26) are formed on the top surface of the counter substrate (14). The bump structure (26) is positioned in a region corresponding to at least the bonding member (11,12,13), and has a higher height than that of the circuit (17).

Methods of forming power electronic assemblies using metal inverse opals and cap structures

Methods for forming bonded assemblies using metal inverse opal and cap structures are disclosed. In one embodiment, a method for forming a bonded assembly includes positioning a substrate against a polymer support that is porous, depositing a metal onto and within the polymer support, disposing a cap layer to the polymer support opposite of the substrate to form a bottom electrode, and removing the polymer support from between the substrate and the cap layer to form a metal inverse opal structure disposed therebetween.

STRESS COMPENSATION FOR WAFER TO WAFER BONDING

Embodiments herein describe techniques for bonded wafers that includes a first wafer bonded with a second wafer, and a stress compensation layer in contact with the first wafer or the second wafer. The first wafer has a first stress level at a first location, and a second stress level different from the first stress level at a second location. The stress compensation layer includes a first material at a first location of the stress compensation layer that induces a third stress level at the first location of the first wafer, a second material different from the first material at a second location of the stress compensation layer that induces a fourth stress level different from the third stress level at the second location of the first wafer. Other embodiments may be described and/or claimed.

STRESS COMPENSATION FOR WAFER TO WAFER BONDING

Embodiments herein describe techniques for bonded wafers that includes a first wafer bonded with a second wafer, and a stress compensation layer in contact with the first wafer or the second wafer. The first wafer has a first stress level at a first location, and a second stress level different from the first stress level at a second location. The stress compensation layer includes a first material at a first location of the stress compensation layer that induces a third stress level at the first location of the first wafer, a second material different from the first material at a second location of the stress compensation layer that induces a fourth stress level different from the third stress level at the second location of the first wafer. Other embodiments may be described and/or claimed.

Method for producing a silver sintering agent having silver oxide surfaces and use of said agent in methods for joining components by pressure sintering

A method for the production of a silver sintering agent in the form of a layer-shaped silver sintering body having silver oxide surfaces and the use thereof are provided.

Method for producing a silver sintering agent having silver oxide surfaces and use of said agent in methods for joining components by pressure sintering

A method for the production of a silver sintering agent in the form of a layer-shaped silver sintering body having silver oxide surfaces and the use thereof are provided.