A bonding structure formed on a substrate includes an indium layer and a passivating nickel plating formed on the indium layer. The nickel plating serves to prevent a reaction involving the indium layer.

A bonding structure formed on a substrate includes an indium layer and a passivating nickel plating formed on the indium layer. The nickel plating serves to prevent a reaction involving the indium layer.

A bonding structure formed on a substrate includes an indium layer and a passivating nickel plating formed on the indium layer. The nickel plating serves to prevent a reaction involving the indium layer.

A bonding structure formed on a substrate includes an indium layer and a passivating nickel plating formed on the indium layer. The nickel plating serves to prevent a reaction involving the indium layer.

An electronic device includes a substrate and a wiring. The wiring is provided above the substrate and includes a NiB layer and a copper layer provided on the NiB layer. The NiB layer contains 3.2% by weight to 5% by weight of boron.

Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.

Semiconductor packages are provided. In one example, a semiconductor package may include a substrate comprising a through hole extending through the substrate. The semiconductor package may include a semiconductor die on the substrate. The semiconductor die may be overlapping the through hole. The through hole in the substrate may be at least partially filled with an electroless deposited portion.

A package structure includes a substrate, a chip disposed on the substrate and having a backside surface away from the substrate, a heat sink disposed above the substrate and having a surface facing the back side surface, and a thermal interface material disposed between the chip and the heat sink. There is no organic adhesive between the chip and the heat sink. A method for forming the package structure is also provided.