Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/26
Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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H01L2224/31
Structure, shape, material or disposition of the layer connectors after the connecting process
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H01L2224/32
of an individual layer connector
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H01L2224/32151
the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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H01L2224/32153
the body and the item being arranged next to each other, e.g. on a common substrate
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H01L2224/32155
the item being non-metallic, e.g. being an insulating substrate with or without metallisation
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H01L2224/32167
the layer connector connecting to a bonding area disposed in a recess of the surface of the item
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H01L2224/32167

SEMICONDUCTOR DETECTOR AND METHOD OF MANUFACTURING THE SAME
20210375978 · 2021-12-02 ·

A technique capable of improving a performance of a semiconductor detector is provided. The semiconductor detector is made based on injection of an underfill into a gap between a first semiconductor chip and a second semiconductor chip in a flip-chip connection state, but the underfill is not formed in periphery of a connection structure connecting a reading electrode pad and a gate terminal through a bump electrode.

Semiconductor detector and method of manufacturing the same
11417702 · 2022-08-16 · ·

A technique capable of improving a performance of a semiconductor detector is provided. The semiconductor detector is made based on injection of an underfill into a gap between a first semiconductor chip and a second semiconductor chip in a flip-chip connection state, but the underfill is not formed in periphery of a connection structure connecting a reading electrode pad and a gate terminal through a bump electrode.