A semiconductor device includes a pre-molded leadframe mounting substrate. The substrate includes a die pad (configured to have a semiconductor die mounted thereon) and a first electrically conductive pad and a second electrically conductive pad. A strip of insulating material is molded between the first and second electrically conductive pads to provide a mutually electrically insulation and extends in a longitudinal direction with the first electrically conductive pad and the second electrically conductive pad lying on opposite sides of the strip of insulating material. A semiconductor die is arranged on the die pad in register with the strip of insulating material. A single electrically conductive ribbon extending in register with the strip of insulating material electrically couples the semiconductor die with both the first and second electrically conductive pads to provide a common current flow path from the semiconductor die towards the first and the second electrically conductive pads.

A circuit module includes a substrate with a patterned metal surface. The patterned metal surface includes a conductive terminal pad, a first conductive pad, and a second conductive pad that is non-adjacent to the conductive terminal pad. A first circuit portion is assembled on the first conductive pad and a second circuit portion is assembled on the second conductive pad. A conductive bridge electrically couples the conductive terminal pad and the second conductive pad. The conductive bridge includes an elevated span extending above and across the first conductive pad.

A power module is provided. The power module includes a substrate, a power conversion chip that is disposed on the substrate and an insulating film that is formed on a structure in which the power conversion chip is disposed on the substrate. Additionally, the power module includes a metal mold that encases the structure that is coated with the insulating film. Additionally, the power module provides a simplified structure and improved heat dissipation performance compared to conventional power modules.

A power module is provided. The power module includes a substrate, a power conversion chip that is disposed on the substrate and an insulating film that is formed on a structure in which the power conversion chip is disposed on the substrate. Additionally, the power module includes a metal mold that encases the structure that is coated with the insulating film. Additionally, the power module provides a simplified structure and improved heat dissipation performance compared to conventional power modules.

A semiconductor component includes a support having a lead integrally formed thereto. An insulated metal substrate is mounted to a surface of the support and a semiconductor chip is mounted to the insulated metal substrate. A III-N based semiconductor chip is mounted to the insulated metal substrate, where the III-N based semiconductor chip has a gate bond pad, a drain bond pad, and a source bond pad. A silicon based semiconductor chip is mounted to the III-N based semiconductor chip. In accordance with an embodiment the silicon based semiconductor chip includes a device having a gate bond pad, a drain bond pad, and a source bond pad. The drain bond pad of the III-N based semiconductor chip may be bonded to the substrate or to a lead. In accordance with another embodiment, the silicon based semiconductor chip is a diode.

An embodiment related to a device. The device includes a first die with first and second die surfaces. The second die surface is bonded to a first die attach pad (DAP) disposed on a first substrate surface of a package substrate and the first die surface includes a first die contact pad. The device also includes a first clip bond including a first clip bond horizontal planar portion attached to the first die contact pad on the first die surface, and a first clip bond vertical portion disposed on an edge of the first clip bond horizontal planar portion. The first clip bond vertical portion is attached to a first substrate bond pad on the first substrate surface. The device further includes a first conductive clip-die bonding layer with spacers on the first die contact pad of the first die. The first conductive clip-die bonding layer bonds the first clip bond horizontal planar portion to the first die contact pad, and the spacers maintain a uniform Bond Line Thickness (BLT) of the first conductive clip-die bonding layer.

The semiconductor device includes a semiconductor element, a first lead, and a second lead. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a thickness direction. The semiconductor element includes an electron transit layer disposed between the element obverse surface and the element reverse surface and formed of a nitride semiconductor, a first electrode disposed on the element obverse surface, and a second electrode disposed on the element reverse surface and electrically connected to the first electrode. The semiconductor element is mounted on the first lead, and the second electrode is joined to the first lead. The second lead is electrically connected to the first electrode. The semiconductor element is a transistor. The second lead is spaced apart from the first lead and is configured such that a main current to be subjected to switching flows therethrough.

In one embodiment, methods for making semiconductor devices are disclosed.

In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.

A semiconductor device includes a chip that includes a mounting surface, a non-mounting surface, and a side wall connecting the mounting surface and the non-mounting surface and has an eaves portion protruding further outward than the mounting surface at the side wall and a metal layer that covers the mounting surface.