Patent classifications
H01L2224/4052
Semiconductor package and related methods
Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.
Semiconductor Package and Related Methods
Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.
SEMICONDUCTOR PACKAGE AND RELATED METHODS
Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.
CLIP
There is disclosed a clip for a semi-conductor device. At least part of the clip is formed from a metallic foam.
Semiconductor package and related methods
Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.
SEMICONDUCTOR DEVICE
A semiconductor device according to the present embodiment includes a first insulating substrate having a first surface and a second surface opposite the first surface. First and second electrically conductive layers are provided on a side of the first surface. A plurality of semiconductor chips each have a third surface facing the first surface, a fourth surface opposite the third surface, a first electrode provided on the third surface, and a second electrode provided on the fourth surface. The first electrode is electrically connected to the first electrically conductive layer. A common electrode plate has a fifth surface facing the fourth surface, is electrically connected to the second electrodes of the semiconductor chips in common, and is electrically connected to the second electrically conductive layer. A second insulating substrate is provided on a side of the second surface of the first insulating substrate.
SEMICONDUCTOR PACKAGE AND RELATED METHODS
Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.