An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, the bonding wire contains an element that provides bonding reliability in a high-temperature environment, and a strength ratio defined by the following Equation (1) is 1.1 to 1.6:
Strength ratio=ultimate strength/0.2% offset yield strength.(1)

A bonding wire includes a Cu alloy core material, and a Pd coating layer formed on the Cu alloy core material. The bonding wire contains at least one element selected from Ni, Zn, Rh, In, Ir, and Pt. A concentration of the elements in total relative to the entire wire is 0.03% by mass or more and 2% by mass or less. When measuring crystal orientations on a cross-section of the core material in a direction perpendicular to a wire axis of the bonding wire, a crystal orientation <100> angled at 15 degrees or less to a wire axis direction has a proportion of 50% or more among crystal orientations in the wire axis direction. An average crystal grain size in the cross-section of the core material in the direction perpendicular to the wire axis of the bonding wire is 0.9 m or more and 1.3 m or less.

Techniques for thermal management of an integrated circuit die are provided. In an example, an apparatus can include a first integrated circuit die having a thermal bond pad and a plurality of active components and a pair of thermoelectric bond wires. The thermal bond pad can be electrically isolated from the plurality of active components and the pair of thermoelectric bond wires can be coupled to the thermal bond pad at a bond location.

An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface thereof. Containing an element that provides bonding reliability in a high-temperature environment improves the bonding reliability of the ball bonded part in high temperature. Furthermore, making an orientation proportion of a crystal orientation <100> angled at 15 degrees or less to a wire longitudinal direction among crystal orientations in the wire longitudinal direction 30% or more when measuring crystal orientations on a cross-section of the core material in a direction perpendicular to a wire axis of the bonding wire, and making an average crystal grain size in the cross-section of the core material in the direction perpendicular to the wire axis of the bonding wire 0.9 to 1.5 m provides a strength ratio of 1.6 or less.

A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, the bonding wire contains an element that provides bonding reliability in a high-temperature environment, and a strength ratio defined by the following Equation (1) is 1.1 to 1.6:

Strength ratio=ultimate strength/0.2% offset yield strength.(1)

A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface thereof. Containing an element that provides bonding reliability in a high-temperature environment improves the bonding reliability of the ball bonded part in high temperature. Furthermore, making an orientation proportion of a crystal orientation <100> angled at 15 degrees or less to a wire longitudinal direction among crystal orientations in the wire longitudinal direction 30% or more when measuring crystal orientations on a cross-section of the core material in a direction perpendicular to a wire axis of the bonding wire, and making an average crystal grain size in the cross-section of the core material in the direction perpendicular to the wire axis of the bonding wire 0.9 to 1.5 m provides a strength ratio of 1.6 or less.