A semiconductor package includes a package substrate including an insulating layer having an upper surface and a lower surface and provided with a first region which is recessed to a first depth from the upper surface toward the lower surface, a redistribution wiring buried in the insulating layer, a chip connection pad on a bottom surface of the recessed first region and connected to the redistribution wiring, and a wire connection pad on the upper surface of the insulating layer and connected to the redistribution wiring, a first semiconductor chip overlapping, in a top-down view of the semiconductor package, the recessed first region of the insulating layer and comprising a first chip pad connected to the chip connection pad of the package substrate, and a second semiconductor chip on the first semiconductor chip and connected to the wire connection pad of the package substrate through a conductive wire.

A semiconductor package includes a package substrate including an insulating layer having an upper surface and a lower surface and provided with a first region which is recessed to a first depth from the upper surface toward the lower surface, a redistribution wiring buried in the insulating layer, a chip connection pad on a bottom surface of the recessed first region and connected to the redistribution wiring, and a wire connection pad on the upper surface of the insulating layer and connected to the redistribution wiring, a first semiconductor chip overlapping, in a top-down view of the semiconductor package, the recessed first region of the insulating layer and comprising a first chip pad connected to the chip connection pad of the package substrate, and a second semiconductor chip on the first semiconductor chip and connected to the wire connection pad of the package substrate through a conductive wire.

A semiconductor package of the present invention comprises a base plate, an insulating substrate, and a lead frame, wherein the base plate is made of a metallic material including Cu and Be—Cu. The present invention can ensure bonding reliability and thus prevent performance degradation of semiconductor devices.

A semiconductor package of the present invention comprises a base plate, an insulating substrate, and a lead frame, wherein the base plate is made of a metallic material including Cu and Be—Cu. The present invention can ensure bonding reliability and thus prevent performance degradation of semiconductor devices.

A method of manufacturing a light emitting device includes: providing a substantially flat plate-shaped base member which in plan view includes at least one first portion having an upper surface, and a second portion surrounding the at least one first portion and having inner lateral surfaces; mounting at least one light emitting element on the at least one first portion; shifting a relative positional relationship between the at least one first portion and the second portion in an upper-lower direction to form at least one recess defined by an upper surface of the at least one first portion that serves as a bottom surface of the at least one recess and at least portions of the inner lateral surfaces of the second portion that serve as lateral surfaces of the at least one recess; and bonding the at least one first portion and the second portion with each other.

A method of manufacturing a light emitting device includes: providing a substantially flat plate-shaped base member which in plan view includes at least one first portion having an upper surface, and a second portion surrounding the at least one first portion and having inner lateral surfaces; mounting at least one light emitting element on the at least one first portion; shifting a relative positional relationship between the at least one first portion and the second portion in an upper-lower direction to form at least one recess defined by an upper surface of the at least one first portion that serves as a bottom surface of the at least one recess and at least portions of the inner lateral surfaces of the second portion that serve as lateral surfaces of the at least one recess; and bonding the at least one first portion and the second portion with each other.

In a copper alloy bonding wire for semiconductor devices, the bonding longevity of a ball bonded part under high-temperature and high-humidity environments is improved. The copper alloy bonding wire for semiconductor devices includes in total 0.03% by mass or more to 3% by mass or less of at least one or more kinds of elements selected from Ni, Zn, Ga, Ge, Rh, In, Ir, and Pt (first element), with the balance Cu and inevitable impurities. The inclusion of a predetermined amount of the first element suppresses production of an intermetallic compound susceptible to corrosion under high-temperature and high-humidity environments at the wire bonding interface and improves the bonding longevity of a ball bonded part.

A semiconductor package assembly includes a carrier with a die attach surface and a contact pad separated from the die attach surface, a semiconductor die mounted on the die attach surface, the semiconductor die having a front side metallization that faces away from the die attach surface, an interconnect ribbon attached to the semiconductor die and the contact pad such that the interconnect ribbon electrically connects the front side metallization to the contact pad, and an electrically insulating encapsulant body that encapsulates the semiconductor die and at least part of the interconnect ribbon. The interconnect ribbon includes a layer stack of a first metal layer and a second layer formed on top of the first metal layer. The first metal layer includes a different metal as the second metal layer. The first metal layer faces the front side metallization.

A semiconductor package assembly includes a carrier with a die attach surface and a contact pad separated from the die attach surface, a semiconductor die mounted on the die attach surface, the semiconductor die having a front side metallization that faces away from the die attach surface, an interconnect ribbon attached to the semiconductor die and the contact pad such that the interconnect ribbon electrically connects the front side metallization to the contact pad, and an electrically insulating encapsulant body that encapsulates the semiconductor die and at least part of the interconnect ribbon. The interconnect ribbon includes a layer stack of a first metal layer and a second layer formed on top of the first metal layer. The first metal layer includes a different metal as the second metal layer. The first metal layer faces the front side metallization.

A method for manufacturing a light emitting device includes: preparing a first substrate having an upper surface comprising an element placement region; placing a light emitting element in the element placement region; disposing an uncured, sheet-like light-transmissive member on the light emitting element and bringing an outer edge of a lower surface of the light-transmissive member into contact with an outer upper surface of the element placement region of the first substrate by pressing the light-transmissive member; and disposing a first protrusion portion along an outer edge of an upper surface of the light-transmissive member so that the first protrusion portion extends over the upper surface of the first substrate and the upper surface of the light-transmissive member.