An IC package includes an interconnect having a first platform and a second platform that are spaced apart. The IC package includes a die superposing a portion of the first platform of the interconnect. The die has a field effect transistor (FET), and a matrix of pads for the FET situated on a surface of the die. The matrix of pads having a row of source pads and a row of drain pads. A drain wire bond extends from a first drain pad to a second drain pad of the row of drain pads and to the first platform of the interconnect. A source wire bond extends from a first source pad to a second source pad of the row of source pads, back over the first source pad and is coupled to a connection region of the first platform.

A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.

Provided is a method for manufacturing a semiconductor device which connects a first bond point and a second bond point by a wire. The method includes: a ball bonding step in which a crimping ball and a ball neck are formed at the first bond point by ball bonding; a thin-walled portion forming step in which a thin-walled portion having a reduced cross-sectional area is formed between the ball neck and the crimping ball; a wire tail separating step in which after a capillary is raised to unroll a wire tail, the capillary is moved in a direction to the second bond point, and the wire tail and the crimping ball are separated in the thin-walled portion; and a wire tail joining step in which the capillary is lowered and a side surface of the separated wire tail is joined onto the crimping ball.

Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a package substrate, a redistribution layer on the package substrate, a vertical connection terminals that connects the package substrate to the redistribution layer, a first semiconductor chip between the package substrate and the redistribution layer, a first molding layer that fills a space between the package substrate and the redistribution layer, a second semiconductor chip on the redistribution layer, a third semiconductor chip on the second semiconductor chip, a first connection wire that directly and vertically connects the redistribution layer to a first chip pad of the third semiconductor chip, the first chip pad is beside the second semiconductor chip and on a bottom surface of the third semiconductor chip, and a second molding layer on the redistribution layer and covering the second semiconductor chip and the third semiconductor chip.

A method of forming a flip-chip integrated circuit die that includes a front side including active circuitry formed therein and a plurality of bond pads in electrical communication with the active circuitry, at least two through-wafer vias in electrical communication with the active circuitry and extending at least partially though the die and having portions at a rear side of the die, and a bond wire external to the die and electrically coupling the portions of the at least two through-wafer vias to one another at the rear side of the die.

Embodiments of the disclosure provide a backlight module using MJT LEDs and a backlight unit including the same. More specifically, embodiments of the disclosure provide a backlight module, which includes MJT LEDs configured to increase an effective light emitting area of each of light emitting cells and optical members capable of uniformly dispersing light emitted from the MJT LEDs. In addition, embodiments of the disclosure provide a backlight unit using the backlight module, thereby reducing the number of LEDs constituting the backlight unit while allowing operation at low current.

A half-bridge power semiconductor module includes an insulating wiring board including a positive-electrode wiring conductor, a bridge wiring conductor, and a negative-electrode wiring conductor arranged on or above a single insulating plate in such a way as to be electrically insulated from each other. The back-surface electrodes of a high-side power semiconductor device and a low-side power semiconductor device are joined to the front sides of the positive-electrode wiring conductor and the bridge wiring conductor. Front-surface electrodes of the high-side power semiconductor device and the low-side power semiconductor device are connected to the bridge wiring conductor and the negative-electrode wiring conductor by a plurality of bonding wires and a plurality of bonding wires.

A light emitting device includes: a first lead including a first base portion having a constant thickness and a first small-thickness portion having a thickness smaller than that of the first base portion; a second lead including a second base portion having a constant thickness and a second small-thickness portion having a thickness smaller than that of the second base portion; wherein the first small-thickness portion and the second small-thickness portion face each other with a gap interposed therebetween; the length of the gap is 0.9 to 1.2 times the thickness of the edges of the first small-thickness portion and the second small-thickness portion; the length of the bonding wire in a plan view of the light emitting device is smaller than a value obtained by adding the thickness of the base portion, a width of a mounting-disabled area, and a width of a bonding-disabled area.

An object of the invention is to manufacture a semiconductor module small. A metal wire (212) connecting a control electrode (101) and a control terminal (21) rises to form a first angle (θ1) from the control electrode (101) toward a first conductive portion (202), gradually goes in substantially parallel to the first conductive portion (202) as the metal wire approaches the first conductive portion (202), and is connected to the control terminal (21) to form a second angle (θ2) smaller than the first angle (θ1).

A semiconductor device includes a mounting substrate having a first surface, a semiconductor chip mounted on the first surface and having a second surface facing a side opposite to the first surface, and a wire extending from a first joint point on the first surface toward a second joint point on the second surface and electrically connecting the mounting substrate and the semiconductor chip to each other by connecting the first joint point and the second joint point to each other. The wire includes a first part, a first bent portion, a second part, a second bent portion, and a third part arranged in order from the first joint point toward the second joint point. The first part is positioned on the first surface side with respect to the second surface when viewed in a first direction along the first surface and the second surface.