H01L2224/4878

SEMICONDUCTOR DEVICE AND INSPECTION DEVICE

A semiconductor device 10 includes a pair of electrodes 16 and a conductive connection member 21 electrically bonded to the pair of electrodes 16. At least a portion of a perimeter of a bonding surface 24 of at least one of the pair of electrodes 16 and the conductive connection member 21 includes an electromigration reducing area 22.

Semiconductor integrated circuit device

In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.

Semiconductor integrated circuit device

In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.

Semiconductor device and inspection device

A semiconductor device 10 includes a pair of electrodes 16 and a conductive connection member 21 electrically bonded to the pair of electrodes 16. At least a portion of a perimeter of a bonding surface 24 of at least one of the pair of electrodes 16 and the conductive connection member 21 includes an electromigration reducing area 22.

Semiconductor device with metal film and method for manufacturing semiconductor device with metal film

An element electrode is located on a surface of a semiconductor element. A metal film is located on the element electrode and includes an inner region and an outer region located around the inner region. The metal film has an opening that exposes the element electrode between the inner region and the outer region. The element electrode has solder wettability lower than solder wettability of the metal film. An external electrode is solder-bonded to the inner region of the metal film.

Semiconductor device with metal film and method for manufacturing semiconductor device with metal film

An element electrode is located on a surface of a semiconductor element. A metal film is located on the element electrode and includes an inner region and an outer region located around the inner region. The metal film has an opening that exposes the element electrode between the inner region and the outer region. The element electrode has solder wettability lower than solder wettability of the metal film. An external electrode is solder-bonded to the inner region of the metal film.

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
20170005048 · 2017-01-05 ·

In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
20170005048 · 2017-01-05 ·

In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.