Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.

Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.

A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.

A method including stacking a number of silicon dice such that one or more edges of the dice are in vertical alignment, where the one or more edges include a number of connection pads. The method also includes positioning a connecting wire on a substantially perpendicular axis to the one or more edges. The connecting wire includes a number of solder blocks formed thereon. The solder blocks are spaced at intervals associated with a distance between a first set of aligned connection pads on the dice. The connecting wire is positioned such that the solder blocks are in contact with the first set of aligned connection pads. The method also includes applying heat to cause the solder blocks to reflow and physically and electrically couple the connecting wire to the connection pads.

Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.

A method including stacking a number of silicon dice such that one or more edges of the dice are in vertical alignment, where the one or more edges include a number of connection pads. The method also includes positioning a connecting wire on a substantially perpendicular axis to the one or more edges. The connecting wire includes a number of solder blocks formed thereon. The solder blocks are spaced at intervals associated with a distance between a first set of aligned connection pads on the dice. The connecting wire is positioned such that the solder blocks are in contact with the first set of aligned connection pads. The method also includes applying heat to cause the solder blocks to reflow and physically and electrically couple the connecting wire to the connection pads.