Patent classifications
H01L2224/80211
METHOD FOR BONDING SEMICONDUCTOR DEVICES, METHOD FOR FORMING SEMICONDUCTOR STRUCTURE AND SYSTEM FOR PERFORMING THE METHOD
A method for bonding semiconductor devices is provided. The method may include several operations. A wafer and a chip are formed. The wafer and the chip are disposed in a low-pressure environment. A planar surface of the chip is moved toward a planar surface of the wafer. A void is formed between the planar surface of the chip and the planar surface of the wafer. The chip is bonded to the wafer. A bonded structure of the chip and the wafer is disposed under a standard atmosphere and a size of the void is reduced. A system for forming a semiconductor structure is also provided.
Structure for bonding and electrical contact for direct bond hybridization
A direct bond hybridization (DBH) method is provided. The DBH method includes preparing a first underlying layer, a first contact layer disposed on the first underlying layer and a first contact electrically communicative with the first underlying layer and protruding through the first contact layer, preparing a second underlying layer, a second contact electrically communicative with the second underlying layer and formed of softer material than the first contact and a second contact layer disposed on the second underlying layer and defining an aperture about the second contact and a moat at least partially surrounding the second contact and bonding the first and second contact layers whereby the first contact contacts the second contact such that the second contact deforms and expands into the moat.
STRUCTURE FOR BONDING AND ELECTRICAL CONTACT FOR DIRECT BOND HYBRIDIZATION
A direct bond hybridization (DBH) method is provided. The DBH method includes preparing a first underlying layer, a first contact layer disposed on the first underlying layer and a first contact electrically communicative with the first underlying layer and protruding through the first contact layer, preparing a second underlying layer, a second contact electrically communicative with the second underlying layer and formed of softer material than the first contact and a second contact layer disposed on the second underlying layer and defining an aperture about the second contact and a moat at least partially surrounding the second contact and bonding the first and second contact layers whereby the first contact contacts the second contact such that the second contact deforms and expands into the moat.
Method for bonding semiconductor devices, method for forming semiconductor structure and system for performing the method
A method for bonding semiconductor devices is provided. The method may include several operations. A wafer and a chip are formed. The wafer and the chip are disposed in a low-pressure environment. A planar surface of the chip is moved toward a planar surface of the wafer. A void is formed between the planar surface of the chip and the planar surface of the wafer. The chip is bonded to the wafer. A bonded structure of the chip and the wafer is disposed under a standard atmosphere and a size of the void is reduced. A system for forming a semiconductor structure is also provided.
PACKAGED DEVICE WITH OPTICAL PATHWAY
A packaged device includes an optical IC having an optical feature therein. An interconnect structure including layers of conductive features embedded within respective layers of dielectric materials overlie the optical feature. The interconnect structure is patterned to remove the interconnect structure from over the optical feature and a dielectric material having optically neutral properties, relative to a desired light wavelength(s) is formed over the optical feature. One or more electronic ICs may be bonded to the optical IC to form an integrated package.
Packaged device including an optical path structure aligned to an optical feature
A packaged device includes an optical IC having an optical feature therein. An interconnect structure including layers of conductive features embedded within respective layers of dielectric materials overlie the optical feature. The interconnect structure is patterned to remove the interconnect structure from over the optical feature and a dielectric material having optically neutral properties, relative to a desired light wavelength(s) is formed over the optical feature. One or more electronic ICs may be bonded to the optical IC to form an integrated package.