A hybridized image sensor includes a first die and a second die. The first die includes a first surface, a first plurality of conductive bumps fabricated on the first surface, and a first alignment feature fabricated on the first surface. The second die includes a second surface, a second plurality of conductive bumps fabricated on the second surface, and second alignment features fabricated on the second surface, wherein the first alignment features interact with the second alignment features to align the first plurality of conductive bumps with the second plurality of conductive bumps.

Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.

Embodiments provide a method for packaging a semiconductor, a semiconductor package structure, and a package. The packaging method includes: providing a substrate wafer having a first surface and a second surface arranged opposite to each other, the first surface having a plurality of grooves, a plurality of electrically conductive pillars being provided at a bottom of the groove, and the electrically conductive pillar penetrating through the bottom of the groove to the second surface; providing a plurality of semiconductor die stacks; placing the semiconductor die stack in the groove; and filling an insulating dielectric in a gap between a sidewall of the groove and the semiconductor die stack to form an insulating dielectric layer covering an upper surface of the semiconductor die stack to seal up the semiconductor die stack so as to form the semiconductor package structure.

This mounting device (100) comprises: a base (10) that moves linearly in relation to a substrate (16); a bonding head (20) that is attached to the base (10); a camera (25) that is attached to the base (10) and identifies the position of the substrate (16); a linear scale (33) having a plurality of graduations along the movement direction; a bonding head-side encoder head (31); and a camera-side encoder head (32). A control unit (50) causes the base (10) to move to a position where the bonding head-side encoder head (31) detects the position of a graduation. Due to this configuration, positioning accuracy of a semiconductor die (15) in relation to the substrate (16) is improved.

A hybridized image sensor includes a first die and a second die. The first die includes a first surface, a first plurality of conductive bumps fabricated on the first surface, and a first alignment feature fabricated on the first surface. The second die includes a second surface, a second plurality of conductive bumps fabricated on the second surface, and second alignment features fabricated on the second surface, wherein the first alignment features interact with the second alignment features to align the first plurality of conductive bumps with the second plurality of conductive bumps.

This mounting device (100) comprises: a base (10) that moves linearly in relation to a substrate (16); a bonding head (20) that is attached to the base (10); a camera (25) that is attached to the base (10) and identifies the position of the substrate (16); a linear scale (33) having a plurality of graduations along the movement direction; a bonding head-side encoder head (31); and a camera-side encoder head (32). A control unit (50) causes the base (10) to move to a position where the bonding head-side encoder head (31) detects the position of a graduation. Due to this configuration, positioning accuracy of a semiconductor die (15) in relation to the substrate (16) is improved.

A chip on glass package assembly includes a glass substrate, a first type chip, a second type chip and a plurality of connecting lines. The glass substrate includes an active area and a peripheral area connected to the active area. The first type chip is mounted on the peripheral area and including a processor. The second type chip is mounted on the peripheral area and located on a side of the first type chip, wherein the second type chip is different from the first type chip. The connecting lines are disposed on the peripheral area and connecting the first type chip and the second type chip.

A photodetector-array and fabrication method thereof are disclosed. The photodetector-array includes a first and second semiconductor structures having respective active regions defining respective pluralities of active photodetectors and active readout integrated circuit pixels (RICPs) electronically connectable to one another respectively. The first and second semiconductor structures are made with different semiconductor materials/compositions having different first and second coefficients of thermal expansion (CTEs) respectively. The pitch distances of the active photodetectors and the pitch distances of the respective active RICPs are configured in accordance with the difference between the first and second CTEs, such that at high temperatures, at which electrical coupling between the first and second semiconductor structures is performed, the electric contacts of the active photodetectors and of their respective RICPs overlap. Accordingly, after the first and second semiconductor structures are bonded together, at least 99.5% of the active photodetector are electrically connected with their respective RICPs.

An integrated module includes a first component having a photonic device and electrical pads at a first side and a second side opposite to the first side, and a second component having electrical pads and bonded to the first component by matching their electrical pads. An optical signal is incident from an external medium to the photonic device through an anti-reflection coating at the second side of the first component, a partially-etched opening, or an etch-through opening. The opening can either be in the first component so the optical signal is incident at the photonic device from the second side or the opening can be in the second component so the optical signal is incident at the photonic device through part of the second component. When bonding the first component to the second component, a protrusion and indentation pair can be used to increase the alignment accuracy.

Embodiments provide a method for packaging a semiconductor, a semiconductor package structure, and a package. The packaging method includes: providing a substrate wafer having a first surface and a second surface arranged opposite to each other, the first surface having a plurality of grooves, a plurality of electrically conductive pillars being provided at a bottom of the groove, and the electrically conductive pillar penetrating through the bottom of the groove to the second surface; providing a plurality of semiconductor die stacks; placing the semiconductor die stack in the groove; and filling an insulating dielectric in a gap between a sidewall of the groove and the semiconductor die stack to form an insulating dielectric layer covering an upper surface of the semiconductor die stack to seal up the semiconductor die stack so as to form the semiconductor package structure.