An encapsulation of laser direct structuring (LDS) material is molded onto a substrate having first and second semiconductor dice arranged thereon. Laser beam energy is applied to a surface of the encapsulation of LDS material to structure therein die vias extending through the LDS material to the first and second semiconductor dice and a die-to-die line extending at surface of the LDS material between die vias. Laser-induced forward transfer (LIFT) processing is applied to transfer electrically conductive material to the die vias and the die-to-die line extending between die vias. A layer of electrically conductive material electroless grown onto the die vias and the die-to-die line facilitates improved adhesion of the electrically conductive material transferred via LIFT processing.

A device is provided. The device includes a bridge layer over a first substrate. A first connector electrically connecting the bridge layer to the first substrate. A first die is coupled to the bridge layer and the first substrate, and a second die is coupled to the bridge layer.

A carrier substrate having a plurality of receptacles each for receiving and carrying a semiconductor chip is provided. Semiconductor chips are arranged in the receptacles, and metal is plated in the receptacles to form a metal structure on and in contact with the semiconductor chips. The carrier substrate is cut to form separate semiconductor devices.

A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and routing structure on a carrier substrate. At least a portion of the semiconductor die and routing structure are encapsulated with an encapsulant. A cavity formed in the encapsulant. A top portion of the routing structure is exposed through the cavity. A conductive trace is formed to interconnect the semiconductor die with the routing structure.

A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

A method of and device for making a three dimensional electronic circuit. The method comprises coupling one or more magnet wires with a substrate along a surface contour of the substrate, immobilizing the one or more magnet wires on the substrate, and forming the electronic circuit by electrically coupling the one or more magnet wires with an integrated circuit chip.

A variable-stiffness module comprises a rigid structure (10) having a first stiffness, an intermediate substrate (20) having a second stiffness less than the first stiffness, and a flexible substrate (30) having a third stiffness less than the second stiffness. The rigid structure (10) is disposed on the intermediate substrate (20) and the intermediate substrate (20) is disposed on the flexible substrate (30). A conductor (40) is disposed partially on the intermediate substrate (21) and partially on the flexible substrate (30) and connected to the rigid structure (10). The conductor (40) extends from the rigid structure (10) to the intermediate substrate (21) to the flexible substrate (30). In some embodiments, a variable-stiffness module comprises any combination of multiple rigid structures, multiple intermediate substrates, and multiple conductors. The conductor (40) can be an optical conductor or an electrical conductor and can be disposed over the rigid structure (10) or between the rigid structure (10) and the intermediate substrate (21).

A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.

A modular semiconductor device comprises: an encapsulant layer with an encapsulant bottom surface and an encapsulant top surface, wherein the encapsulant layer comprises a component region and an interlayer connection region; wherein the semiconductor component comprises a component conductive pattern exposed from the encapsulant bottom surface; an interlayer connection array disposed within the interlayer connection region, wherein the interlayer connection array comprises one or more conductive vias each extending between the encapsulant bottom surface and the encapsulant top surface; and an interposer layer laminated on the encapsulant layer and having an interposer bottom surface and an interposer top surface, wherein the interposer top surface is in contact with the encapsulant bottom surface; wherein the interposer layer comprises an interposer conductive pattern on the interposer bottom surface, and an interposer interconnection structure electrically coupled to the component conductive pattern, the interposer conductive pattern and the one or more conductive vias.

A method for producing an electric circuit in which a contact carrier comprising a first contact area and a second contact area is provided. An insulating body is applied to the circuit carrier and at least partially covers the first contact area and the second contact area. The insulating body comprises cut-outs in regions both contact areas. A flowable electrical conducting medium is introduced into the insulating body.