An embodiment of the present invention is an IC chip mounting apparatus includes: a conveyor configured to convey an antenna continuous body on a conveying surface, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material, the antenna continuous body having an adhesive and an IC chip placed at a reference position of each of the antennas; a measurement unit configured to measure an interval between adjacent two of the antennas of the antenna continuous body; a press unit moving machine configured to sequentially feed out press units each having a pressing surface, from a waiting position, to move each of the press units along the conveying surface; and a controller configured to control timing of feeding out each of the press units from the waiting position based on the interval measured by the measurement unit, so that the pressing surface of each of the press units presses a predetermined region containing the reference position of each of the antennas on the conveying surface.

An embodiment of the present invention is an IC chip mounting apparatus includes: a conveyor configured to convey an antenna continuous body on a conveying surface, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material, the antenna continuous body having an adhesive and an IC chip placed at a reference position of each of the antennas; a measurement unit configured to measure an interval between adjacent two of the antennas of the antenna continuous body; a press unit moving machine configured to sequentially feed out press units each having a pressing surface, from a waiting position, to move each of the press units along the conveying surface; and a controller configured to control timing of feeding out each of the press units from the waiting position based on the interval measured by the measurement unit, so that the pressing surface of each of the press units presses a predetermined region containing the reference position of each of the antennas on the conveying surface.

A composition exhibits excellent heat resistance and mounting reliability when bonding a semiconductor power element to a metal lead frame, which is also free of lead and thereby places little burden on the environment. An electrically conductive composition contains at least a sulfide compound represented by R—S—R′ (wherein R is an organic group containing at least carbon; R′ is an organic group that is the same as or different from R; and R and R′ may be bonded to each other to form a so-called cyclic sulfide) and metal particles containing at least Cu, Sn or Ni as its essential component. Further, a conductive paste and a conductive bonding film each are produced using the electrically conductive composition. A dicing die bonding film is obtained by bonding the conductive bonding film with an adhesive tape.

The present disclosure relates to an adhesive transfer film for bonding a semiconductor chip and a spacer to a substrate and a method for manufacturing a power module substrate by using same, the adhesive transfer film being obtained by manufacturing an Ag sintering paste in the form of a film. The present disclosure can reduce the process time by minimizing a sintering process, and can reduce equipment investment cost.

A die attachment material may include an ultra-violet (UV) curable resin and silver particles to attach a chip to a submount, where the silver particles are positioned within the UV curable resin. A method may include heating the die attachment material to obtain the UV curable resin on sintered silver particles, where at least a portion of the die attachment material is position between a chip and a submount. The method may further include irradiating, with UV light, the UV curable resin to obtain a polymer on the sintered silver particles. The polymer may form a layer on the sintered silver particles.

A die attachment material may include an ultra-violet (UV) curable resin and silver particles to attach a chip to a submount, where the silver particles are positioned within the UV curable resin. A method may include heating the die attachment material to obtain the UV curable resin on sintered silver particles, where at least a portion of the die attachment material is position between a chip and a submount. The method may further include irradiating, with UV light, the UV curable resin to obtain a polymer on the sintered silver particles. The polymer may form a layer on the sintered silver particles.

An electronic device which connects a circuit film to a display panel by applying a conductive material to the insides of holes formed in the circuit film, so as to improve reliability of bonding, and a display device using the same, are discussed.

A display device includes a first substrate that includes a first electrode, a second substrate disposed under the first substrate and that includes, a second electrode that overlaps the first electrode, and an anisotropic conductive film disposed between the first substrate and the second substrate. The anisotropic conductive film includes an insulating resin layer and a plurality of conductive particles in the insulating resin layer. The conductive particles include first conductive particles that overlap the first electrode and the second electrode, and second conductive particles other than the first conductive particles. Each of the first conductive particles and the second conductive particles includes a first flat surface, a second flat surface that faces the first flat surface, and a curved surface rounded between the first flat surface and the second flat surface.

Disclosed are an array substrate, and a display device, and a method for manufacturing the same. The array substrate includes: a base substrate, and a thin film transistor, a planarization pattern, a bonding pattern, and a conductive structure that are disposed on the base substrate. The thin film transistor, the planarization pattern, and the bonding pattern are laminated in a direction going distally from the base substrate. The planarization pattern is provided with a via and a groove, the conductive structure is disposed in the via, wherein the bonding pattern is conductive and is electrically connected to the thin film transistor by the conductive structure, an orthographic projection of the bonding pattern on the base substrate falls outside an orthographic projection of the groove on the base substrate, and the groove is configured to accommodate an adhesive.

Disclosed are an array substrate, and a display device, and a method for manufacturing the same. The array substrate includes: a base substrate, and a thin film transistor, a planarization pattern, a bonding pattern, and a conductive structure that are disposed on the base substrate. The thin film transistor, the planarization pattern, and the bonding pattern are laminated in a direction going distally from the base substrate. The planarization pattern is provided with a via and a groove, the conductive structure is disposed in the via, wherein the bonding pattern is conductive and is electrically connected to the thin film transistor by the conductive structure, an orthographic projection of the bonding pattern on the base substrate falls outside an orthographic projection of the groove on the base substrate, and the groove is configured to accommodate an adhesive.