A semiconductor device is vertically mounted on a medium such as a printed circuit board (PCB). The semiconductor device comprises a block of semiconductor dies, mounted in a vertical stack without offset. Once formed and encapsulated, side grooves may be formed in the device exposing electrical conductors of each die within the device. The electrical conductors exposed in the grooves mount to electrical contacts on the medium to electrically couple the semiconductor device to the medium.

A method for manufacturing a display device includes checking a particle positioned between a display panel and a connecting member, irradiating a laser to an upper surface of the connecting member overlapping at least a part of the particle, removing the connecting member overlapping a region to which the laser is irradiated, removing the particle overlapping a region to which the laser is irradiated, and disposing a desiccant in a hole formed by removing the connecting member and the particle.

Exemplified microscale selective laser sintering (μ-SLS or micro-SLS) systems and methods facilitate modeling of the nanoparticle powder bed by simulating the interactions between particles during the powder spreading operation. In particular, the exemplified methods and system use multiscale modeling techniques to accurately predict the formation and mechanical/electrical properties of parts produced by selective laser sintering of powder beds. Discrete element modeling is used for nanoscale particle interactions by implementing the different forces dominant at nanoscale. A heat transfer analysis is used to predict the sintering of individual particles in the powder beds in order to build up a complete structural model of the parts that are being produced by the SLS process.

An electronic device which connects a circuit film to a display panel by applying a conductive material to the insides of holes formed in the circuit film, so as to improve reliability of bonding, and a display device using the same, are discussed.

An integrated circuit packaging method and an integrated packaging circuit, the integrated circuit packaging method including: circuit layers are provided on the top surface of a substrate, the bottom surface of the substrate or the interior of the substrate, the circuit layers having circuit pins; the substrate is provided with connection through holes, and the connection through holes are joined up with the circuit pins; a device is placed on the substrate, and the device is provided with device pins on a surface facing the substrate, which makes the device pins join up with a first opening of the connection through holes; conductive layers are fabricated in the connection through holes by means of a second opening of the connection through holes; and the conductive layers electrically connect the device pins to the circuit pins.

An integrated circuit packaging method and an integrated packaging circuit, the integrated circuit packaging method including: circuit layers are provided on the top surface of a substrate, the bottom surface of the substrate or the interior of the substrate, the circuit layers having circuit pins; the substrate is provided with connection through holes, and the connection through holes are joined up with the circuit pins; a device is placed on the substrate, and the device is provided with device pins on a surface facing the substrate, which makes the device pins join up with a first opening of the connection through holes; conductive layers are fabricated in the connection through holes by means of a second opening of the connection through holes; and the conductive layers electrically connect the device pins to the circuit pins.

Disclosed is a semiconductor package comprising a lower substrate including a conductive line; a first semiconductor chip on the lower substrate; an under-fill layer between the first semiconductor chip and the lower substrate, the under-fill layer including a central part below the first semiconductor chip and an edge part isolated from direct contact with the central part in a first direction parallel to a top surface of the lower substrate, and a recess region between the central part and the edge part. The recess region may be defined by a sidewall of the central part, a sidewall of the edge part, and a top surface of the conductive line in the lower substrate.

A method for manufacturing a display device includes checking a particle positioned between a display panel and a connecting member, irradiating a laser to an upper surface of the connecting member overlapping at least a part of the particle, removing the connecting member overlapping a region to which the laser is irradiated, removing the particle overlapping a region to which the laser is irradiated, and disposing a desiccant in a hole formed by removing the connecting member and the particle.

A semiconductor device includes a silicon carbide layer, a metal carbide layer arranged over the silicon carbide layer, and a solder layer arranged over and in contact with the metal carbide layer.

A method for manufacturing a display device includes checking a particle positioned between a display panel and a connecting member, irradiating a laser to an upper surface of the connecting member overlapping at least a part of the particle, removing the connecting member overlapping a region to which the laser is irradiated, removing the particle overlapping a region to which the laser is irradiated, and disposing a desiccant in a hole formed by removing the connecting member and the particle.