A power semiconductor module includes a substrate with a metallization layer that is structured. A semiconductor chip having a first side bonded to the metallization layer. A metal clip, which is a strip of metal, has a first planar part bonded to a second side of the semiconductor chip opposite to the first side. The metal clip also has a second planar part bonded to the metallization layer. A mold encapsulation at least partially encloses the substrate and the metal clip. The mold encapsulation has a recess approaching towards the first planar part of the metal clip. The semiconductor chip is completely enclosed by the mold encapsulation, the substrate and the metal clip and the first planar part of the metal clip is at least partially exposed by the recess. A sensor is accommodated in the recess.

A power semiconductor module includes a substrate with a metallization layer that is structured. A semiconductor chip having a first side bonded to the metallization layer. A metal clip, which is a strip of metal, has a first planar part bonded to a second side of the semiconductor chip opposite to the first side. The metal clip also has a second planar part bonded to the metallization layer. A mold encapsulation at least partially encloses the substrate and the metal clip. The mold encapsulation has a recess approaching towards the first planar part of the metal clip. The semiconductor chip is completely enclosed by the mold encapsulation, the substrate and the metal clip and the first planar part of the metal clip is at least partially exposed by the recess. A sensor is accommodated in the recess.

The semiconductor device includes: a heat spreader; a semiconductor element joined to the heat spreader via a first joining member; a first lead frame joined to the heat spreader via a second joining member; a second lead frame joined to the semiconductor element via a third joining member; and a mold resin. In a cross-sectional shape obtained by cutting at a plane perpendicular to a one-side surface of the heat spreader, an angle on the third joining member side out of two angles formed by a one-side surface of the semiconductor element and a straight line connecting an end point of a joining surface between the third joining member and the semiconductor element and an end point of a joining surface between the third joining member and the second lead frame, is not smaller than 90° and not larger than 135°.

A semiconductor device including a substrate; a chip on which a surface electrode is formed; and a lead. The lead includes a first electrode connecting portion disposed on the surface electrode and electrically connected to the surface electrode of the chip via a conductive bonding material; a second electrode connecting portion electrically connected to an electrode portion of a wiring pattern. A lead connected to the first electrode connecting portion and the second electrode connecting portion. The lead further has a thermal shrinking stress equalizing structure on a portion of an outer periphery of the first electrode connecting portion. The lead is configured to make a thermal shrinking stress applied to a conductive bonding material between the first electrode connecting portion and the surface electrode equal.

A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can, and an IC semiconductor device copackaged with the power semiconductor device inside the can.

An electronic component includes a leadframe and a first semiconductor die. The leadframe includes a leadframe top side, a leadframe bottom side opposite the leadframe top side, and a top notch at the leadframe top side. The top notch includes a top notch base located between the leadframe top side and the leadframe bottom side, and defining a notch length of the top notch, and can also include a top notch first sidewall extended, along the notch length, from the leadframe top side to the top notch base. The first semiconductor die can include a die top side a die bottom side opposite the die top side and mounted onto the leadframe top side, and a die perimeter. The top notch can be located outside the die perimeter. Other examples and related methods are also disclosed herein.

An electronic component includes a leadframe and a first semiconductor die. The leadframe includes a leadframe top side, a leadframe bottom side opposite the leadframe top side, and a top notch at the leadframe top side. The top notch includes a top notch base located between the leadframe top side and the leadframe bottom side, and defining a notch length of the top notch, and can also include a top notch first sidewall extended, along the notch length, from the leadframe top side to the top notch base. The first semiconductor die can include a die top side a die bottom side opposite the die top side and mounted onto the leadframe top side, and a die perimeter. The top notch can be located outside the die perimeter. Other examples and related methods are also disclosed herein.

A semiconductor device is provided that includes a lead frame, a die attached to the lead frame using a first solder, a clip attached to the die using a second solder, and a copper slug attached to the clip. First gull wing leads are attached to the leadframe for a drain connection of the semiconductor device. Second gull wing leads are attached to the clip for a gate connection and for a source connection of the semiconductor device.

A power module for PCB embedding includes: a leadframe; a power semiconductor die with a first load terminal and control terminal at a first side of the die and a second load terminal at the opposite side, the second load terminal soldered to the leadframe; a first metal clip soldered to the first load terminal and forming a first terminal of the power module at a first side of the power module; and a second metal clip soldered to the control terminal and forming a second terminal of the power module at the first side of the power module. The leadframe forms a third terminal of the power module at the first side of the power module, or a third metal clip is soldered to the leadframe and forms the third terminal. The power module terminals are coplanar within +/−30 μm at the first side of the power module.

In a general aspect, an apparatus can include an inner package including a first silicon carbide die having a die gate conductor coupled to a common gate conductor, and a second silicon carbide die having a die gate conductor coupled to the common gate conductor. The apparatus can include an outer package including a substrate coupled to the common gate conductor, and a clip coupled to the inner package and coupled to the substrate.