Methods, systems, and apparatuses for preventing corrosion between dissimilar bonded metals. The method includes providing a wafer having a plurality of circuits, each of the plurality of circuits having a plurality of bond pads including a first metal; applying a coating onto at least the plurality of bond pads; etching a hole in the coating on each of the plurality of bond pads to provide an exposed portion of the plurality of bond pads; dicing the wafer to separate each of the plurality of circuits; die bonding each of the plurality of circuits to a respective packaging substrate; and performing a bonding process to bond a second, dissimilar metal to the exposed portion of each of the plurality of bond pads such that the second, dissimilar metal encloses the hole in the coating of each of the plurality of bond pads, thereby enclosing the exposed portion.

A semiconductor device comprising: bonding pads formed in the first wiring layer; and first wirings and a second wiring formed in a second wiring layer provided one layer below the first wiring layer. Here, a power supply potential and a reference potential are to be supplied to each first wiring and the second wiring, respectively. Also, in transparent plan view, each of the first wirings is arranged next to each other, and is arranged at a first position of the second wiring layer, that is overlapped with the bonding region of the first bonding pad. Also, in transparent plan view, the second wiring is arranged at a second position of the second wiring layer, that is overlapped with a first region located between the first bonding pad and the second bonding pad. Further, a width of each first wiring is less than a width of the second wiring.

A semiconductor device comprising: bonding pads formed in the first wiring layer; and first wirings and a second wiring formed in a second wiring layer provided one layer below the first wiring layer. Here, a power supply potential and a reference potential are to be supplied to each first wiring and the second wiring, respectively. Also, in transparent plan view, each of the first wirings is arranged next to each other, and is arranged at a first position of the second wiring layer, that is overlapped with the bonding region of the first bonding pad. Also, in transparent plan view, the second wiring is arranged at a second position of the second wiring layer, that is overlapped with a first region located between the first bonding pad and the second bonding pad. Further, a width of each first wiring is less than a width of the second wiring.

One aspect relates to a method that includes bonding an electrically conductive element to a bonding surface of a bonding partner by increasing a temperature of a bonding section of the electrically conductive element from an initial temperature to an increased temperature by passing an electric heating current through the bonding section, and pressing the bonding section with a pressing force against the bonding surface using a sonotrode and introducing an ultrasonic vibration into the bonding section via the sonotrode such that the increased temperature of the bonding section, the ultrasonic signal in the bonding section and the pressing force are simultaneously present and cause the formation of a tight and direct bond between the bonding section and the bonding surface.

As one embodiment, a method of manufacturing a semiconductor device includes the following steps. That is, the method of manufacturing a semiconductor device includes a first step of applying ultrasonic waves to a ball portion of a first wire in contact with a first electrode of the semiconductor chip while pressing the ball portion with a first load. In addition, the method of manufacturing a semiconductor device includes a step of, after the first step, applying the ultrasonic waves to the ball portion while pressing the ball portion with a second load larger than the first load, thereby bonding the ball portion and the first electrode.

Method for producing wire bond connections between an electronic component or a module and a substrate with energy input into a bonding wire by an ultrasonic transducer, wherein during the energy input for forming a first wire bond connection, at least one bonding parameter characterizing the instantaneous state of the bonding wire is measured in dependence on time, the curve shape of the time dependence is differentiated by means of predetermined comparative criteria or curves into three curve sections and hereby the temporal course of the method into three phases, to be specific, a cleaning, a fusion and a tempering phase, and the energy fed into the ultrasonic transducer and/or the bonding force exerted on the bonding wire and/or the duration of the energy input into at least one partial section of at least the cleaning and the fusion phase, in particular each of the cleaning, fusion and tempering phases is/are controlled independent of the measurement result in quasi real time during the formation of the first wire bond connection or during the subsequent formation of a second wire bond connection of the same type in dependence on the curve shape in the associated curve section in a phase-specific manner.

As one embodiment, a method of manufacturing a semiconductor device includes the following steps. That is, the method of manufacturing a semiconductor device includes a first step of applying ultrasonic waves to a ball portion of a first wire in contact with a first electrode of the semiconductor chip while pressing the ball portion with a first load. In addition, the method of manufacturing a semiconductor device includes a step of, after the first step, applying the ultrasonic waves to the ball portion while pressing the ball portion with a second load larger than the first load, thereby bonding the ball portion and the first electrode.

Improves light extraction efficiency. A light emitting device 1 using a white resin molding package 5 integrally molded with lead frames 3, 4 constituting an electrode corresponding to one or a plurality of light emitting element 2 and white resin, wherein an area in a plane view of a white resin surface on a reflective surface that is level with amounting surface of the light emitting element 2 is configured to be larger than total area in a plane view occupied by surfaces of the lead frames 3, 4 and the light emitting element. Further, a step section is formed on the surfaces of lead frames 3, 4, white resin is filled in the step section, and the area of white resin surface on a reflective surface where the light emitting element 2 is mounted is increased.