A semiconductor package assembly includes a carrier with a die attach surface and a contact pad separated from the die attach surface, a semiconductor die mounted on the die attach surface, the semiconductor die having a front side metallization that faces away from the die attach surface, an interconnect ribbon attached to the semiconductor die and the contact pad such that the interconnect ribbon electrically connects the front side metallization to the contact pad, and an electrically insulating encapsulant body that encapsulates the semiconductor die and at least part of the interconnect ribbon. The interconnect ribbon includes a layer stack of a first metal layer and a second layer formed on top of the first metal layer. The first metal layer includes a different metal as the second metal layer. The first metal layer faces the front side metallization.

There is provided a bonding wire for semiconductor devices that exhibits a favorable bondability even when being applied to wedge bonding at the room temperature, and also achieves an excellent bond reliability. The bonding wire includes a core material of Cu or Cu alloy (hereinafter referred to as a “Cu core material”), and a coating containing a noble metal formed on a surface of the Cu core material. A concentration of Cu at a surface of the wire is 30 to 80 at%.

Embodiments include a microelectronic package structure having a substrate with one or more substrate pads on a first side of the package substrate. A ball interconnect structure is on the substrate pad, the ball interconnect structure comprising at least 99.0 percent gold. A discrete component having two or more component terminals is on the ball interconnect structure.

A semiconductor package assembly includes a carrier with a die attach surface and a contact pad separated from the die attach surface, a semiconductor die mounted on the die attach surface, the semiconductor die having a front side metallization that faces away from the die attach surface, an interconnect ribbon attached to the semiconductor die and the contact pad such that the interconnect ribbon electrically connects the front side metallization to the contact pad, and an electrically insulating encapsulant body that encapsulates the semiconductor die and at least part of the interconnect ribbon. The interconnect ribbon includes a layer stack of a first metal layer and a second layer formed on top of the first metal layer. The first metal layer includes a different metal as the second metal layer. The first metal layer faces the front side metallization.

Provided is a wire bonding apparatus for electrically connecting an electrode and an aluminum alloy wire to each other by wire bonding. The apparatus includes a wire feeding device which feeds the wire. The wire has a diameter not less than 500 m and not greater than 600 m. The apparatus includes a heating device heats the wire to a temperature that is not lower than 50 C. and not higher than 100 C. The apparatus further includes a pressure device which presses the wire against the electrode. The apparatus further includes an ultrasonic wave generating device which generates an ultrasonic vibration that is applied to the wire that is pressed by the pressure device.

A method is provided for connecting a chip die to a circuit board with a capillary dispenser to deposit gold. The method includes forming a first bond by depositing gold from the dispenser to a board pad on the circuit board; forming a second bond by depositing the gold from the dispenser to a die pad on the chip die; extruding a filament of the gold by the dispenser in a normal direction from the second bond; rotating the filament laterally away from the first bond along a first radius; extruding the filament while rotating the filament towards the first bond along a second radius larger than the first radius; and forming a third bond by depositing the gold on the first bond to form a third bond.

Embodiments include a microelectronic package structure having a substrate with one or more substrate pads on a first side of the package substrate. A ball interconnect structure is on the substrate pad, the ball interconnect structure comprising at least 99.0 percent gold. A discrete component having two or more component terminals is on the ball interconnect structure.

An assembled semiconductor device and a method of making an assembled semiconductor device are disclosed. In one embodiment the assembled device includes a carrier having a first thickness, a connection layer disposed on the carrier and a chip disposed on the connection layer, the chip having a second thickness, wherein the second thickness is larger than the first thickness.

An assembled semiconductor device and a method of making an assembled semiconductor device are disclosed. In one embodiment the assembled device includes a carrier having a first thickness, a connection layer disposed on the carrier and a chip disposed on the connection layer, the chip having a second thickness, wherein the second thickness is larger than the first thickness.

The present invention consists of an implantable device with at least one package that houses electronics that sends and receives data or signals, and optionally power, from an external system through at least one coil attached to the at least one package and processes the data, including recordings of neural activity, and delivers electrical pulses to neural tissue through at least one array of multiple electrodes that is/are attached to the at least one package. The invention, or components thereof, is/are intended to be installed in the head, or on or in the cranium or on the dura, or on or in the brain. Variations of the embodiments depend on the physical locations of the coil(s), package(s) and array(s) with respect to the head, cranium, dura, and brain. Novel features of the present invention include the small size of the implantable package which houses the controller, the high number of electrodes that are provided for stimulation and/or sensing and stimulation, and the methods for manufacturing such a device. These features have unique applications in neural stimulation to treat or prevent disorders or disease.